radeonsi: adjust epitch for PIPE_FORMAT_R8G8_R8B8_UNORM

This fix si_compute_copy_image for yuyv image (so using PIPE_FORMAT_R8G8_R8B8_UNORM).

With this change, the following gst pipeline produce the expected results for various
image sizes (with or without AMD_DEBUG=nodma):

gst-launch-1.0 filesrc location=input.jpg ! jpegparse ! vaapijpegdec ! filesink location=output.yuv

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5841>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2020-07-13 15:36:25 +02:00 committed by Marge Bot
parent 87ecfdfbf0
commit d2a3ca289f

View file

@ -389,8 +389,18 @@ void si_set_mutable_tex_desc_fields(struct si_screen *sscreen, struct si_texture
state[3] |= S_008F1C_SW_MODE(tex->surface.u.gfx9.stencil.swizzle_mode);
state[4] |= S_008F20_PITCH(tex->surface.u.gfx9.stencil.epitch);
} else {
uint16_t epitch = tex->surface.u.gfx9.surf.epitch;
if (tex->buffer.b.b.format == PIPE_FORMAT_R8G8_R8B8_UNORM &&
block_width == 1) {
/* epitch is patched in ac_surface for sdma/vcn blocks to get
* a value expressed in elements unit.
* But here the texture is used with block_width == 1 so we
* need epitch in pixel units.
*/
epitch = (epitch + 1) / tex->surface.blk_w - 1;
}
state[3] |= S_008F1C_SW_MODE(tex->surface.u.gfx9.surf.swizzle_mode);
state[4] |= S_008F20_PITCH(tex->surface.u.gfx9.surf.epitch);
state[4] |= S_008F20_PITCH(epitch);
}
state[5] &=