From d2563e6600fd74dc000fdb031d17d54971ff67cb Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 1 Nov 2022 09:59:08 +0000 Subject: [PATCH] ac/nir: do not convert GS outputs to the expected variable size on GFX11 Outputs are always considered 32-bits. Found by inspection. Cc: 22.3 mesa-stable Signed-off-by: Samuel Pitoiset Reviewed-by: Qiang Yu Part-of: --- src/amd/common/ac_nir_lower_ngg.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index 6b2d0ca80e2..8e9e86bf7a4 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -2791,12 +2791,12 @@ ngg_gs_export_vertices(nir_builder *b, nir_ssa_def *max_num_out_vtx, nir_ssa_def nir_ssa_def *val = nir_channel(b, load, i); - /* Convert to the expected bit size of the output variable. */ - unsigned bit_size = glsl_base_type_bit_size(glsl_get_base_type(var->type)); - if (bit_size != 32) - val = nir_u2u(b, val, bit_size); - if (s->options->gfx_level < GFX11 || is_pos) { + /* Convert to the expected bit size of the output variable. */ + unsigned bit_size = glsl_base_type_bit_size(glsl_get_base_type(var->type)); + if (bit_size != 32) + val = nir_u2u(b, val, bit_size); + nir_store_output(b, val, nir_imm_int(b, 0), .base = info->base, .io_semantics = io_sem, .component = start + i, .write_mask = 1); }