mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-08 02:38:04 +02:00
nir/tests: use ASSERT_EQ instead of ASSERT_TRUE in nir_opt_varyings tests
This commit is contained in:
parent
c1173f7a0b
commit
d239887ce7
6 changed files with 54 additions and 54 deletions
|
|
@ -18,7 +18,7 @@ TEST_F(nir_opt_varyings_test_dead_input, producer_stage##_##consumer_stage##_##s
|
|||
nir_def *input = load_input(b2, VARYING_SLOT_##slot, 0, nir_type_float##bitsize, 0, 0); \
|
||||
store_output(b2, VARYING_SLOT_POS, 0, nir_type_float##bitsize, input, 0); \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == nir_progress_consumer); \
|
||||
ASSERT_EQ(opt_varyings(), nir_progress_consumer); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == 0 && \
|
||||
b2->shader->info.patch_inputs_read == 0 && \
|
||||
b2->shader->info.inputs_read_16bit == 0); \
|
||||
|
|
@ -33,7 +33,7 @@ TEST_F(nir_opt_varyings_test_dead_input, producer_stage##_##consumer_stage##_##s
|
|||
nir_def *input = load_input(b2, VARYING_SLOT_##slot, comp, nir_type_float##bitsize, 0, 0); \
|
||||
store_output(b2, VARYING_SLOT_POS, 0, nir_type_float##bitsize, input, 0); \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == nir_progress_consumer); \
|
||||
ASSERT_EQ(opt_varyings(), nir_progress_consumer); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == 0 && \
|
||||
b2->shader->info.patch_inputs_read == 0 && \
|
||||
b2->shader->info.inputs_read_16bit == 0); \
|
||||
|
|
@ -48,8 +48,8 @@ TEST_F(nir_opt_varyings_test_dead_input, producer_stage##_##consumer_stage##_##s
|
|||
nir_def *input = load_input(b2, VARYING_SLOT_##slot, 0, nir_type_float##bitsize, 0, 0); \
|
||||
store_output(b2, VARYING_SLOT_POS, 0, nir_type_float##bitsize, input, 0); \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == 0); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == VARYING_BIT_##slot); \
|
||||
ASSERT_EQ(opt_varyings(), 0); \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read, VARYING_BIT_##slot); \
|
||||
ASSERT_TRUE(shader_contains_def(b2, input)); \
|
||||
}
|
||||
|
||||
|
|
@ -72,9 +72,9 @@ TEST_F(nir_opt_varyings_test_dead_input, \
|
|||
cindex--; \
|
||||
} \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == 0); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == BITFIELD64_BIT(cindex)); \
|
||||
ASSERT_EQ(opt_varyings(), 0); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read, BITFIELD64_BIT(cindex)); \
|
||||
ASSERT_TRUE(shader_contains_def(b2, input)); \
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@ TEST_F(nir_opt_varyings_test_dead_output, \
|
|||
store_output(b1, VARYING_SLOT_##slot, 0, nir_type_float##bitsize, \
|
||||
nir_imm_floatN_t(b1, 0, bitsize), 0); \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == nir_progress_producer); \
|
||||
ASSERT_EQ(opt_varyings(), nir_progress_producer); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == 0 && \
|
||||
b1->shader->info.patch_outputs_written == 0 && \
|
||||
b1->shader->info.outputs_written_16bit == 0); \
|
||||
|
|
@ -37,9 +37,9 @@ TEST_F(nir_opt_varyings_test_dead_output, \
|
|||
nir_imm_floatN_t(b1, 0, bitsize), 0); \
|
||||
\
|
||||
ASSERT_EQ(opt_varyings(), nir_progress_producer); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == VARYING_BIT_##slot); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, VARYING_BIT_##slot); \
|
||||
ASSERT_TRUE(shader_contains_instr(b1, &intr->instr)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(intr).no_varying == \
|
||||
ASSERT_EQ(nir_intrinsic_io_semantics(intr).no_varying, \
|
||||
(VARYING_SLOT_##slot != VARYING_SLOT_POS && \
|
||||
VARYING_SLOT_##slot != VARYING_SLOT_PSIZ && \
|
||||
VARYING_SLOT_##slot != VARYING_SLOT_CLIP_VERTEX)); \
|
||||
|
|
@ -77,17 +77,17 @@ TEST_F(nir_opt_varyings_test_dead_output, \
|
|||
ASSERT_EQ(opt_varyings(), nir_progress_producer); \
|
||||
\
|
||||
if (index >= VARYING_SLOT_VAR0_16BIT) { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written_16bit == \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written_16bit, \
|
||||
BITFIELD_BIT(index - VARYING_SLOT_VAR0_16BIT)); \
|
||||
} else { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(index)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(index)); \
|
||||
} \
|
||||
ASSERT_TRUE(shader_contains_instr(b1, &intr->instr)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(intr).no_varying == \
|
||||
ASSERT_EQ(nir_intrinsic_io_semantics(intr).no_varying, \
|
||||
(VARYING_SLOT_##slot != VARYING_SLOT_POS && \
|
||||
VARYING_SLOT_##slot != VARYING_SLOT_PSIZ && \
|
||||
VARYING_SLOT_##slot != VARYING_SLOT_CLIP_VERTEX)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_xfb(intr).out[0].num_components == 1); \
|
||||
ASSERT_EQ(nir_intrinsic_io_xfb(intr).out[0].num_components, 1); \
|
||||
}
|
||||
|
||||
#define TEST_DEAD_OUTPUT_LOAD_TO_UNDEF(producer_stage, consumer_stage, slot, bitsize) \
|
||||
|
|
@ -98,7 +98,7 @@ TEST_F(nir_opt_varyings_test_dead_output, \
|
|||
nir_def *output = load_output(b1, VARYING_SLOT_##slot, 0, nir_type_float##bitsize, 0); \
|
||||
store_ssbo(b1, output); \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == nir_progress_producer); \
|
||||
ASSERT_EQ(opt_varyings(), nir_progress_producer); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_read == 0 && \
|
||||
b1->shader->info.patch_outputs_read == 0 && \
|
||||
b1->shader->info.outputs_read_16bit == 0); \
|
||||
|
|
|
|||
|
|
@ -62,10 +62,10 @@ TEST_F(nir_opt_varyings_test_prop_const, \
|
|||
\
|
||||
if (nir_slot_is_sysval_output((gl_varying_slot)pindex, MESA_SHADER_##consumer_stage)) { \
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
} else { \
|
||||
ASSERT_TRUE(opt_varyings() == (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == 0 && \
|
||||
b1->shader->info.patch_outputs_written == 0 && \
|
||||
b1->shader->info.outputs_written_16bit == 0); \
|
||||
|
|
@ -101,7 +101,7 @@ TEST_F(nir_opt_varyings_test_prop_const, \
|
|||
nir_intrinsic_set_io_xfb(store3, xfb); \
|
||||
\
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == 0 && \
|
||||
b2->shader->info.patch_inputs_read == 0 && \
|
||||
|
|
@ -116,18 +116,18 @@ TEST_F(nir_opt_varyings_test_prop_const, \
|
|||
{ \
|
||||
SHADER_CONST_OUTPUT(producer_stage, consumer_stage, slot, comp, type, bitsize, val0, val1) \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == 0); \
|
||||
ASSERT_EQ(opt_varyings(), 0); \
|
||||
if (pindex >= VARYING_SLOT_VAR0_16BIT) { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written_16bit == \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written_16bit, \
|
||||
BITFIELD_BIT(pindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read_16bit == \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read_16bit, \
|
||||
BITFIELD_BIT(cindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
} else if (pindex >= VARYING_SLOT_PATCH0) { \
|
||||
ASSERT_TRUE(b1->shader->info.patch_outputs_written == BITFIELD_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.patch_inputs_read == BITFIELD_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.patch_outputs_written, BITFIELD_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.patch_inputs_read, BITFIELD_BIT(cindex)); \
|
||||
} else { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == BITFIELD64_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read, BITFIELD64_BIT(cindex)); \
|
||||
} \
|
||||
ASSERT_TRUE(shader_contains_instr(b1, &store->instr)); \
|
||||
ASSERT_TRUE(shader_contains_def(b2, input)); \
|
||||
|
|
|
|||
|
|
@ -62,10 +62,10 @@ TEST_F(nir_opt_varyings_test_prop_ubo, \
|
|||
\
|
||||
if (nir_slot_is_sysval_output((gl_varying_slot)pindex, MESA_SHADER_##consumer_stage)) { \
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
} else { \
|
||||
ASSERT_TRUE(opt_varyings() == (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == 0 && \
|
||||
b1->shader->info.patch_outputs_written == 0 && \
|
||||
b1->shader->info.outputs_written_16bit == 0); \
|
||||
|
|
@ -101,7 +101,7 @@ TEST_F(nir_opt_varyings_test_prop_ubo, \
|
|||
nir_intrinsic_set_io_xfb(store3, xfb); \
|
||||
\
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == 0 && \
|
||||
b2->shader->info.patch_inputs_read == 0 && \
|
||||
|
|
@ -116,18 +116,18 @@ TEST_F(nir_opt_varyings_test_prop_ubo, \
|
|||
{ \
|
||||
SHADER_UBO_OUTPUT(producer_stage, consumer_stage, slot, comp, type, bitsize, index0, index1) \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == 0); \
|
||||
ASSERT_EQ(opt_varyings(), 0); \
|
||||
if (pindex >= VARYING_SLOT_VAR0_16BIT) { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written_16bit == \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written_16bit, \
|
||||
BITFIELD_BIT(pindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read_16bit == \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read_16bit, \
|
||||
BITFIELD_BIT(cindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
} else if (pindex >= VARYING_SLOT_PATCH0) { \
|
||||
ASSERT_TRUE(b1->shader->info.patch_outputs_written == BITFIELD_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.patch_inputs_read == BITFIELD_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.patch_outputs_written, BITFIELD_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.patch_inputs_read, BITFIELD_BIT(cindex)); \
|
||||
} else { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == BITFIELD64_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read, BITFIELD64_BIT(cindex)); \
|
||||
} \
|
||||
ASSERT_TRUE(shader_contains_instr(b1, &store->instr)); \
|
||||
ASSERT_TRUE(shader_contains_def(b2, input)); \
|
||||
|
|
|
|||
|
|
@ -62,10 +62,10 @@ TEST_F(nir_opt_varyings_test_prop_uniform, \
|
|||
\
|
||||
if (nir_slot_is_sysval_output((gl_varying_slot)pindex, MESA_SHADER_##consumer_stage)) { \
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
} else { \
|
||||
ASSERT_TRUE(opt_varyings() == (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == 0 && \
|
||||
b1->shader->info.patch_outputs_written == 0 && \
|
||||
b1->shader->info.outputs_written_16bit == 0); \
|
||||
|
|
@ -101,7 +101,7 @@ TEST_F(nir_opt_varyings_test_prop_uniform, \
|
|||
nir_intrinsic_set_io_xfb(store3, xfb); \
|
||||
\
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == 0 && \
|
||||
b2->shader->info.patch_inputs_read == 0 && \
|
||||
|
|
@ -116,18 +116,18 @@ TEST_F(nir_opt_varyings_test_prop_uniform, \
|
|||
{ \
|
||||
SHADER_UNIFORM_OUTPUT(producer_stage, consumer_stage, slot, comp, type, bitsize, index0, index1) \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == 0); \
|
||||
ASSERT_EQ(opt_varyings(), 0); \
|
||||
if (pindex >= VARYING_SLOT_VAR0_16BIT) { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written_16bit == \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written_16bit, \
|
||||
BITFIELD_BIT(pindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read_16bit == \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read_16bit, \
|
||||
BITFIELD_BIT(cindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
} else if (pindex >= VARYING_SLOT_PATCH0) { \
|
||||
ASSERT_TRUE(b1->shader->info.patch_outputs_written == BITFIELD_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.patch_inputs_read == BITFIELD_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.patch_outputs_written, BITFIELD_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.patch_inputs_read, BITFIELD_BIT(cindex)); \
|
||||
} else { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == BITFIELD64_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read, BITFIELD64_BIT(cindex)); \
|
||||
} \
|
||||
ASSERT_TRUE(shader_contains_instr(b1, &store->instr)); \
|
||||
ASSERT_TRUE(shader_contains_def(b2, input)); \
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ TEST_F(nir_opt_varyings_test_prop_uniform_expr, \
|
|||
\
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
if (nir_slot_is_sysval_output((gl_varying_slot)pindex, MESA_SHADER_##consumer_stage)) { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
} else { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == 0 && \
|
||||
|
|
@ -100,7 +100,7 @@ TEST_F(nir_opt_varyings_test_prop_uniform_expr, \
|
|||
nir_intrinsic_set_io_xfb(store3, xfb); \
|
||||
\
|
||||
ASSERT_EQ(opt_varyings(), (nir_progress_producer | nir_progress_consumer)); \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(nir_intrinsic_io_semantics(store).no_varying); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == 0 && \
|
||||
b2->shader->info.patch_inputs_read == 0 && \
|
||||
|
|
@ -115,18 +115,18 @@ TEST_F(nir_opt_varyings_test_prop_uniform_expr, \
|
|||
{ \
|
||||
SHADER_UNI_EXPR_OUTPUT(producer_stage, consumer_stage, slot, comp, type, bitsize, index0, index1) \
|
||||
\
|
||||
ASSERT_TRUE(opt_varyings() == 0); \
|
||||
ASSERT_EQ(opt_varyings(), 0); \
|
||||
if (pindex >= VARYING_SLOT_VAR0_16BIT) { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written_16bit == \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written_16bit, \
|
||||
BITFIELD_BIT(pindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read_16bit == \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read_16bit, \
|
||||
BITFIELD_BIT(cindex - VARYING_SLOT_VAR0_16BIT)); \
|
||||
} else if (pindex >= VARYING_SLOT_PATCH0) { \
|
||||
ASSERT_TRUE(b1->shader->info.patch_outputs_written == BITFIELD_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.patch_inputs_read == BITFIELD_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.patch_outputs_written, BITFIELD_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.patch_inputs_read, BITFIELD_BIT(cindex)); \
|
||||
} else { \
|
||||
ASSERT_TRUE(b1->shader->info.outputs_written == BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_TRUE(b2->shader->info.inputs_read == BITFIELD64_BIT(cindex)); \
|
||||
ASSERT_EQ(b1->shader->info.outputs_written, BITFIELD64_BIT(pindex)); \
|
||||
ASSERT_EQ(b2->shader->info.inputs_read, BITFIELD64_BIT(cindex)); \
|
||||
} \
|
||||
ASSERT_TRUE(shader_contains_instr(b1, &store->instr)); \
|
||||
ASSERT_TRUE(shader_contains_def(b2, input)); \
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue