diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h index 8853b7410ce..2a81eceb2e5 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h @@ -73,6 +73,7 @@ struct nv50_ir_prog_symbol uint32_t offset; }; +#define NVISA_G80_CHIPSET 0x50 #define NVISA_GF100_CHIPSET 0xc0 #define NVISA_GK104_CHIPSET 0xe0 #define NVISA_GK20A_CHIPSET 0xea diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 487a1e49b47..1c8c1c43fba 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp @@ -3329,6 +3329,8 @@ nvir_nir_shader_compiler_options(int chipset) return op; } +static const nir_shader_compiler_options g80_nir_shader_compiler_options = +nvir_nir_shader_compiler_options(NVISA_G80_CHIPSET); static const nir_shader_compiler_options gf100_nir_shader_compiler_options = nvir_nir_shader_compiler_options(NVISA_GF100_CHIPSET); static const nir_shader_compiler_options gm107_nir_shader_compiler_options = @@ -3343,5 +3345,7 @@ nv50_ir_nir_shader_compiler_options(int chipset) return &gv100_nir_shader_compiler_options; if (chipset >= NVISA_GM107_CHIPSET) return &gm107_nir_shader_compiler_options; - return &gf100_nir_shader_compiler_options; + if (chipset >= NVISA_GF100_CHIPSET) + return &gf100_nir_shader_compiler_options; + return &g80_nir_shader_compiler_options; } diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index e06d9f1a5d4..7fe61bb5897 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -27,7 +27,8 @@ #include "util/format/u_format_s3tc.h" #include "util/u_screen.h" #include "pipe/p_screen.h" -#include "compiler/nir/nir.h" + +#include "codegen/nv50_ir_driver.h" #include "nv50/nv50_context.h" #include "nv50/nv50_screen.h" @@ -980,45 +981,13 @@ int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space) return 1; } -static const nir_shader_compiler_options nir_options = { - .fuse_ffma16 = false, /* nir doesn't track mad vs fma */ - .fuse_ffma32 = false, /* nir doesn't track mad vs fma */ - .fuse_ffma64 = false, /* nir doesn't track mad vs fma */ - .lower_flrp32 = true, - .lower_flrp64 = true, - .lower_fpow = false, - .lower_uadd_carry = true, - .lower_usub_borrow = true, - .lower_ffract = true, - .lower_pack_half_2x16 = true, - .lower_pack_unorm_2x16 = true, - .lower_pack_snorm_2x16 = true, - .lower_pack_unorm_4x8 = true, - .lower_pack_snorm_4x8 = true, - .lower_unpack_half_2x16 = true, - .lower_unpack_unorm_2x16 = true, - .lower_unpack_snorm_2x16 = true, - .lower_unpack_unorm_4x8 = true, - .lower_unpack_snorm_4x8 = true, - .lower_extract_byte = true, - .lower_extract_word = true, - .lower_insert_byte = true, - .lower_insert_word = true, - .lower_all_io_to_temps = false, - .lower_cs_local_index_from_id = true, - .lower_rotate = true, - .lower_to_scalar = true, - .use_interpolated_input_intrinsics = true, - .max_unroll_iterations = 32, -}; - static const void * nv50_screen_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir, enum pipe_shader_type shader) { if (ir == PIPE_SHADER_IR_NIR) - return &nir_options; + return nv50_ir_nir_shader_compiler_options(NVISA_G80_CHIPSET); return NULL; }