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amd/drm-shim: Add vangogh entry.

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22975>
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Bas Nieuwenhuizen 2023-05-11 22:34:28 +02:00 • committed by Marge Bot
parent b0b6811b9b
commit d16cd4c758
1 changed files with 129 additions and 0 deletions
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129
src/amd/drm-shim/amdgpu_noop_drm_shim.c
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@ -508,6 +508,135 @@ static const struct amdgpu_device amdgpu_devices[] = {
},
},
},
{
.name = "vangogh",
.radeon_family = CHIP_VANGOGH,
.hw_ip_gfx = {
.hw_ip_version_major = 10,
.hw_ip_version_minor = 0,
.capabilities_flags = 0llu,
.ib_start_alignment = 32,
.ib_size_alignment = 32,
.available_rings = 0x1,
.ip_discovery_version = 0x0000,
},
.hw_ip_compute = {
.hw_ip_version_major = 10,
.hw_ip_version_minor = 0,
.capabilities_flags = 0llu,
.ib_start_alignment = 32,
.ib_size_alignment = 32,
.available_rings = 0xf,
.ip_discovery_version = 0x0000,
},
.fw_gfx_me = {
.ver = 64,
.feature = 41,
},
.fw_gfx_pfp = {
.ver = 95,
.feature = 41,
},
.fw_gfx_mec = {
.ver = 98,
.feature = 41,
},
.mmr_regs = {
0x263e, 0xffffffff, 0x00000142,
},
.mmr_reg_count = 1,
.dev = {
.device_id = 0x163f,
.chip_rev = 0x00,
.external_rev = 0x01,
.pci_rev = 0xae,
.family = AMDGPU_FAMILY_VGH,
.num_shader_engines = 1,
.num_shader_arrays_per_engine = 1,
.gpu_counter_freq = 100000,
.max_engine_clock = 0llu,
.max_memory_clock = 0llu,
.cu_active_number = 8,
.cu_ao_mask = 0xff,
.cu_bitmap = {
{ 0xff, 0x0, 0x0, 0x0, },
{ 0x0, 0x0, 0x0, 0x0, },
{ 0x0, 0x0, 0x0, 0x0, },
{ 0x0, 0x0, 0x0, 0x0, },
},
.enabled_rb_pipes_mask = 0x3,
.num_rb_pipes = 2,
.num_hw_gfx_contexts = 8,
.pcie_gen = 0,
.ids_flags = 0x1llu,
.virtual_address_offset = 0x200000llu,
.virtual_address_max = 0x800000000000llu,
.virtual_address_alignment = 4096,
.pte_fragment_size = 2097152,
.gart_page_size = 4096,
.ce_ram_size = 65536,
.vram_type = 10,
.vram_bit_width = 256,
.vce_harvest_config = 0,
.gc_double_offchip_lds_buf = 1,
.prim_buf_gpu_addr = 0llu,
.pos_buf_gpu_addr = 0llu,
.cntl_sb_buf_gpu_addr = 0llu,
.param_buf_gpu_addr = 0llu,
.prim_buf_size = 0,
.pos_buf_size = 0,
.cntl_sb_buf_size = 0,
.param_buf_size = 0,
.wave_front_size = 32,
.num_shader_visible_vgprs = 1024,
.num_cu_per_sh = 8,
.num_tcc_blocks = 4,
.gs_vgt_table_depth = 32,
.gs_prim_buffer_depth = 1792,
.max_gs_waves_per_vgt = 32,
.pcie_num_lanes = 0,
.cu_ao_bitmap = {
{ 0xff, 0x0, 0x0, 0x0, },
{ 0x0, 0x0, 0x0, 0x0, },
{ 0x0, 0x0, 0x0, 0x0, },
{ 0x0, 0x0, 0x0, 0x0, },
},
.high_va_offset = 0xffff800000000000llu,
.high_va_max = 0xffffffffffe00000llu,
.pa_sc_tile_steering_override = 0,
.tcc_disabled_mask = 0llu,
.min_engine_clock = 0llu,
.min_memory_clock = 0llu,
.tcp_cache_size = 0,
.num_sqc_per_wgp = 0,
.sqc_data_cache_size = 0,
.sqc_inst_cache_size = 0,
.gl1c_cache_size = 0,
.gl2c_cache_size = 0,
.mall_size = 0llu,
.enabled_rb_pipes_mask_hi = 0,
},
.mem = {
.vram = {
.total_heap_size = 1073741824,
.usable_heap_size = 1040584704,
.heap_usage = 344141824,
.max_allocation = 780438528,
},
.cpu_accessible_vram = {
.total_heap_size = 1073741824,
.usable_heap_size = 1040584704,
.heap_usage = 344141824,
.max_allocation = 780438528,
},
.gtt = {
.total_heap_size = 8522825728,
.usable_heap_size = 8511004672,
.heap_usage = 79179776,
.max_allocation = 6383253504,
},
},
}
};
static void