diff --git a/.pick_status.json b/.pick_status.json index 1f82998eed6..f0344e50a06 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1291,7 +1291,7 @@ "description": "radeonsi: skip vs output optimizations for some outputs", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": "3ec9975555d1cc5365413ad9062f412904f944a3" }, @@ -25730,4 +25730,4 @@ "master_sha": null, "because_sha": null } -] \ No newline at end of file +] diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c index 4b2331a524a..d78110ba820 100644 --- a/src/amd/llvm/ac_llvm_build.c +++ b/src/amd/llvm/ac_llvm_build.c @@ -3081,6 +3081,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx, LLVMValueRef main_fn, uint8_t *vs_output_param_offset, uint32_t num_outputs, + uint32_t skip_output_mask, uint8_t *num_param_exports) { LLVMBasicBlockRef bb; @@ -3124,6 +3125,9 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ctx, target -= V_008DFC_SQ_EXP_PARAM; + if ((1u << target) & skip_output_mask) + continue; + /* Parse the instruction. */ memset(&exp, 0, sizeof(exp)); exp.offset = target; diff --git a/src/amd/llvm/ac_llvm_build.h b/src/amd/llvm/ac_llvm_build.h index e08ab656f9c..4a65f117b21 100644 --- a/src/amd/llvm/ac_llvm_build.h +++ b/src/amd/llvm/ac_llvm_build.h @@ -605,6 +605,7 @@ void ac_optimize_vs_outputs(struct ac_llvm_context *ac, LLVMValueRef main_fn, uint8_t *vs_output_param_offset, uint32_t num_outputs, + uint32_t skip_output_mask, uint8_t *num_param_exports); void ac_init_exec_full_mask(struct ac_llvm_context *ctx); diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 64288be58bb..49065cdbe5b 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -3831,7 +3831,7 @@ ac_nir_eliminate_const_vs_outputs(struct radv_shader_context *ctx) ac_optimize_vs_outputs(&ctx->ac, ctx->main_function, outinfo->vs_output_param_offset, - VARYING_SLOT_MAX, + VARYING_SLOT_MAX, 0, &outinfo->param_exports); } diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index fa35489ea50..0e62bf261fb 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1369,6 +1369,7 @@ static void si_optimize_vs_outputs(struct si_shader_context *ctx) { struct si_shader *shader = ctx->shader; struct si_shader_info *info = &shader->selector->info; + unsigned skip_vs_optim_mask = 0; if ((ctx->type != PIPE_SHADER_VERTEX && ctx->type != PIPE_SHADER_TESS_EVAL) || @@ -1376,10 +1377,20 @@ static void si_optimize_vs_outputs(struct si_shader_context *ctx) shader->key.as_es) return; + /* Optimizing these outputs is not possible, since they might be overriden + * at runtime with S_028644_PT_SPRITE_TEX. */ + for (int i = 0; i < info->num_outputs; i++) { + if (info->output_semantic_name[i] == TGSI_SEMANTIC_PCOORD || + info->output_semantic_name[i] == TGSI_SEMANTIC_TEXCOORD) { + skip_vs_optim_mask |= 1u << shader->info.vs_output_param_offset[i]; + } + } + ac_optimize_vs_outputs(&ctx->ac, ctx->main_fn, shader->info.vs_output_param_offset, info->num_outputs, + skip_vs_optim_mask, &shader->info.nr_param_exports); }