fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 19:40:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

panfrost/midgard: Implement load/store scratch opcodes

Browse source 
These are used to load/store from Thread Local Storage, which is memory
allocated per-thread (corresponding to ctx->scratchpad in the command
stream) and used for register spilling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
This commit is contained in:
Alyssa Rosenzweig 2019-07-19 07:50:48 -07:00
parent 3bb780ecb9
commit d155168e6c
4 changed files with 52 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
src/panfrost/midgard/compiler.h
View file

@ -416,6 +416,9 @@ v_mov(unsigned src, midgard_vector_alu_src mod, unsigned dest)
return ins;
}
midgard_instruction
v_load_store_scratch(unsigned srcdest, unsigned index, bool is_store);
/* Scheduling */
void schedule_program(compiler_context *ctx);

13
src/panfrost/midgard/helpers.h
View file

@ -27,9 +27,20 @@
#define OP_IS_STORE_VARY(op) (\
op == midgard_op_st_vary_16 || \
op == midgard_op_st_vary_32 \
op == midgard_op_st_vary_32 || \
op == midgard_op_st_vary_32u || \
op == midgard_op_st_vary_32i \
)
#define OP_IS_STORE_R26(op) (\
OP_IS_STORE_VARY(op) || \
op == midgard_op_st_char || \
op == midgard_op_st_char2 || \
op == midgard_op_st_char4 || \
op == midgard_op_st_short4 || \
op == midgard_op_st_int4 \
)
#define OP_IS_STORE(op) (\
OP_IS_STORE_VARY(op) || \
op == midgard_op_st_cubemap_coords \

2
src/panfrost/midgard/midgard_ra.c
View file

@ -445,7 +445,7 @@ install_registers_instr(
}
case TAG_LOAD_STORE_4: {
if (OP_IS_STORE_VARY(ins->load_store.op)) {
if (OP_IS_STORE_R26(ins->load_store.op)) {
/* TODO: use ssa_args for st_vary */
ins->load_store.reg = 0;
} else {

36
src/panfrost/midgard/midgard_schedule.c
View file

@ -575,7 +575,43 @@ midgard_pair_load_store(compiler_context *ctx, midgard_block *block)
}
}
midgard_instruction
v_load_store_scratch(unsigned srcdest, unsigned index, bool is_store)
{
/* We index by 32-bit vec4s */
unsigned byte = (index * 4 * 4);
midgard_instruction ins = {
.type = TAG_LOAD_STORE_4,
.mask = 0xF,
.ssa_args = {
.dest = -1,
.src0 = -1,
.src1 = -1
},
.load_store = {
.op = is_store ? midgard_op_st_int4 : midgard_op_ld_int4,
.swizzle = SWIZZLE_XYZW,
/* For register spilling - to thread local storage */
.unknown = 0x1EEA,
/* Splattered across, TODO combine logically */
.varying_parameters = (byte & 0x1FF) << 1,
.address = (byte >> 9)
}
};
if (is_store) {
/* r0 = r26, r1 = r27 */
assert(srcdest == 26 || srcdest == 27);
ins.ssa_args.src0 = SSA_FIXED_REGISTER(srcdest - 26);
} else {
ins.ssa_args.dest = srcdest;
}
return ins;
}
void
schedule_program(compiler_context *ctx)