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r600g: move r6xx-specific streamout flush flagging into r600g

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Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2014-12-29 13:27:46 +01:00
parent 0543630d0b
commit d14f2ab4ad
2 changed files with 7 additions and 9 deletions
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9
src/gallium/drivers/r600/r600_hw_context.c
View file

@ -147,7 +147,8 @@ void r600_flush_emit(struct r600_context *rctx)
cp_coher_cntl |= S_0085F0_FULL_CACHE_ENA(1);
}
if (rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV) {
if (rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV ||
(rctx->b.chip_class == R600 && rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH)) {
cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0);
}
@ -202,7 +203,8 @@ void r600_flush_emit(struct r600_context *rctx)
S_0085F0_CB11_DEST_BASE_ENA(1);
}
if (rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH) {
if (rctx->b.chip_class >= R700 &&
rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH) {
cp_coher_cntl |= S_0085F0_SO0_DEST_BASE_ENA(1) |
S_0085F0_SO1_DEST_BASE_ENA(1) |
S_0085F0_SO2_DEST_BASE_ENA(1) |
@ -211,7 +213,8 @@ void r600_flush_emit(struct r600_context *rctx)
}
/* Workaround for buggy flushing on some R6xx chipsets. */
if (rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV &&
if ((rctx->b.flags & (R600_CONTEXT_FLUSH_AND_INV |
R600_CONTEXT_STREAMOUT_FLUSH)) &&
(rctx->b.family == CHIP_RV670 ||
rctx->b.family == CHIP_RS780 ||
rctx->b.family == CHIP_RS880)) {

7
src/gallium/drivers/radeon/r600_streamout.c
View file

@ -305,12 +305,7 @@ void r600_emit_streamout_end(struct r600_common_context *rctx)
}
rctx->streamout.begin_emitted = false;
if (rctx->chip_class >= R700) {
rctx->flags |= R600_CONTEXT_STREAMOUT_FLUSH;
} else {
rctx->flags |= R600_CONTEXT_FLUSH_AND_INV;
}
rctx->flags |= R600_CONTEXT_STREAMOUT_FLUSH;
}
/* STREAMOUT CONFIG DERIVED STATE