From d12b5e76331a3ac6067bf21093a0c06a2ba6ca13 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Fri, 31 Dec 2021 17:38:25 +0100 Subject: [PATCH] aco: Reuse previous -1 result in find_msb to avoid using VOP3. Totals: CodeSize: 388934388 -> 388933712 (-0.00%) Totals from 208 (0.15% of 134913) affected shaders: CodeSize: 2008016 -> 2007340 (-0.03%) Signed-off-by: Georg Lehmann Reviewed-by: Rhys Perry Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index ac1a53bf5c5..69006733189 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -1743,7 +1743,7 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr) Temp msb = bld.tmp(v1); Temp carry = bld.vsub32(Definition(msb), Operand::c32(31u), Operand(msb_rev), true).def(1).getTemp(); - bld.vop2_e64(aco_opcode::v_cndmask_b32, Definition(dst), msb, Operand::c32(-1), carry); + bld.vop2(aco_opcode::v_cndmask_b32, Definition(dst), msb, msb_rev, carry); } else if (src.regClass() == v2) { aco_opcode op = instr->op == nir_op_ufind_msb ? aco_opcode::v_ffbh_u32 : aco_opcode::v_ffbh_i32; @@ -1761,7 +1761,7 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr) Temp msb = bld.tmp(v1); Temp carry = bld.vsub32(Definition(msb), Operand::c32(63u), Operand(msb_rev), true).def(1).getTemp(); - bld.vop2_e64(aco_opcode::v_cndmask_b32, Definition(dst), msb, Operand::c32(-1), carry); + bld.vop2(aco_opcode::v_cndmask_b32, Definition(dst), msb, msb_rev, carry); } else { isel_err(&instr->instr, "Unimplemented NIR instr bit size"); }