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ac/nir: add 64-bit SSBO atomic operations support

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Except compare&swap which is still buggy.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2019-04-16 10:38:23 +02:00
parent 78c551aca1
commit d118e382dd
1 changed files with 7 additions and 3 deletions
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10
src/amd/common/ac_nir_to_llvm.c
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@ -1643,8 +1643,9 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
const nir_intrinsic_instr *instr)
{
LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
const char *op;
char name[64];
char name[64], type[8];
LLVMValueRef params[6];
int arg_count = 0;
@ -1697,18 +1698,21 @@ static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
params[arg_count++] = ctx->ac.i32_0; /* soffset */
params[arg_count++] = ctx->ac.i32_0; /* slc */
ac_build_type_name_for_intr(return_type, type, sizeof(type));
snprintf(name, sizeof(name),
"llvm.amdgcn.raw.buffer.atomic.%s.i32", op);
"llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
} else {
params[arg_count++] = ctx->ac.i32_0; /* vindex */
params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
params[arg_count++] = ctx->ac.i1false; /* slc */
assert(return_type == ctx->ac.i32);
snprintf(name, sizeof(name),
"llvm.amdgcn.buffer.atomic.%s", op);
}
return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
return ac_build_intrinsic(&ctx->ac, name, return_type, params,
arg_count, 0);
}
static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,