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radv: Add number of LS and HS outputs to tcs_offchip_layout.

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And calculate the LS-HS per-vertex stride in shader code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28490>
This commit is contained in:
Timur Kristóf 2024-04-01 01:03:40 +02:00 • committed by Marge Bot
parent 5a45077d84
commit d116272689
4 changed files with 11 additions and 9 deletions
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5
src/amd/vulkan/nir/radv_nir_lower_abi.c
View file

@ -290,9 +290,8 @@ lower_abi_instr(nir_builder *b, nir_intrinsic_instr *intrin, void *state)
if (s->info->inputs_linked) {
replacement = nir_imm_int(b, get_tcs_input_vertex_stride(s->info->tcs.num_linked_inputs));
} else {
nir_def *lshs_vertex_stride =
GET_SGPR_FIELD_NIR(s->args->tcs_offchip_layout, TCS_OFFCHIP_LAYOUT_LSHS_VERTEX_STRIDE);
replacement = nir_ishl_imm(b, lshs_vertex_stride, 2);
nir_def *num_ls_out = GET_SGPR_FIELD_NIR(s->args->tcs_offchip_layout, TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS);
replacement = nir_iadd_imm_nuw(b, nir_ishl_imm(b, num_ls_out, 4), 4);
}
}
break;

4
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -2692,8 +2692,8 @@ radv_emit_patch_control_points(struct radv_cmd_buffer *cmd_buffer)
unsigned tcs_offchip_layout =
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_PATCH_CONTROL_POINTS, d->vk.ts.patch_control_points) |
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_NUM_PATCHES, cmd_buffer->state.tess_num_patches) |
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_LSHS_VERTEX_STRIDE,
get_tcs_input_vertex_stride(vs->info.vs.num_linked_outputs) / 4) |
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS, vs->info.vs.num_linked_outputs) |
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_NUM_HS_OUTPUTS, tcs->info.tcs.num_linked_outputs) |
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_TES_READS_TF, tes->info.tes.reads_tess_factors) |
SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_PRIMITIVE_MODE, tes->info.tes._primitive_mode);

6
src/amd/vulkan/radv_shader.h
View file

@ -252,8 +252,10 @@ enum radv_ud_index {
#define TCS_OFFCHIP_LAYOUT_PATCH_CONTROL_POINTS__MASK 0x3f
#define TCS_OFFCHIP_LAYOUT_NUM_PATCHES__SHIFT 6
#define TCS_OFFCHIP_LAYOUT_NUM_PATCHES__MASK 0x3f
#define TCS_OFFCHIP_LAYOUT_LSHS_VERTEX_STRIDE__SHIFT 12
#define TCS_OFFCHIP_LAYOUT_LSHS_VERTEX_STRIDE__MASK 0xff /* max 32 * 4 + 1 (to reduce LDS bank conflicts) */
#define TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS__SHIFT 17
#define TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS__MASK 0x3f
#define TCS_OFFCHIP_LAYOUT_NUM_HS_OUTPUTS__SHIFT 23
#define TCS_OFFCHIP_LAYOUT_NUM_HS_OUTPUTS__MASK 0x3f
#define TCS_OFFCHIP_LAYOUT_PRIMITIVE_MODE__SHIFT 29
#define TCS_OFFCHIP_LAYOUT_PRIMITIVE_MODE__MASK 0x03
#define TCS_OFFCHIP_LAYOUT_TES_READS_TF__SHIFT 31

5
src/amd/vulkan/radv_shader_args.h
View file

@ -69,8 +69,9 @@ struct radv_shader_args {
/* TCS */
/* # [0:5] = the number of patch control points
* # [6:11] = the number of tessellation patches
* # [12:19] = the LS-HS vertex stride in DWORDS
* # [20:28] = reserved for future use
* # [12:16] = reserved for future use
* # [17:22] = the number of LS outputs, up to 32
* # [23:28] = the number of HS per-vertex outputs, up to 32
* # [29:30] = tess_primitive_mode
* # [31] = whether TES reads tess factors
*/