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i965/gen6: Force WHILE exec size to 8.

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We can't just look at the instruction that happens to appear at the
start of the loop, because it might be some other exec size and cause
us to only loop on the first N channels.  We always want 8 in our
current code (since 16 doesn't work so we don't do 16-wide fragment in
that case).

Fixes loop-03.vert, which was triggering the assertions.
This commit is contained in:
Eric Anholt 2011-08-12 05:28:53 -07:00
parent 905f3d0309
commit d0c595ac80
1 changed files with 2 additions and 4 deletions
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6
src/mesa/drivers/dri/i965/brw_eu_emit.c
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@ -1341,8 +1341,7 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p,
brw_set_src1(p, insn, brw_imm_ud(0));
insn->bits3.break_cont.jip = br * (do_insn - insn);
insn->header.execution_size = do_insn->header.execution_size;
assert(insn->header.execution_size == BRW_EXECUTE_8);
insn->header.execution_size = BRW_EXECUTE_8;
} else if (intel->gen == 6) {
insn = next_insn(p, BRW_OPCODE_WHILE);
@ -1351,8 +1350,7 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p,
brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
insn->header.execution_size = do_insn->header.execution_size;
assert(insn->header.execution_size == BRW_EXECUTE_8);
insn->header.execution_size = BRW_EXECUTE_8;
} else {
if (p->single_program_flow) {
insn = next_insn(p, BRW_OPCODE_ADD);