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radv: start allocating user sgprs
This adds an initial implementation to allocate the user sgprs and make sure we don't run out if we try to bind a bunch of descriptor sets. This can be enhanced further in the future if we add support for inlining push constants. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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parent
4087eaecd0
commit
d0991b135b
1 changed files with 76 additions and 15 deletions
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@ -556,6 +556,78 @@ static void declare_tess_lds(struct nir_to_llvm_context *ctx)
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"tess_lds");
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}
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struct user_sgpr_info {
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bool need_ring_offsets;
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uint8_t sgpr_count;
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};
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static void allocate_user_sgprs(struct nir_to_llvm_context *ctx,
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struct user_sgpr_info *user_sgpr_info)
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{
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memset(user_sgpr_info, 0, sizeof(struct user_sgpr_info));
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/* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
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if (ctx->stage == MESA_SHADER_GEOMETRY ||
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ctx->stage == MESA_SHADER_VERTEX ||
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ctx->stage == MESA_SHADER_TESS_CTRL ||
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ctx->stage == MESA_SHADER_TESS_EVAL ||
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ctx->is_gs_copy_shader)
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user_sgpr_info->need_ring_offsets = true;
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if (ctx->stage == MESA_SHADER_FRAGMENT &&
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ctx->shader_info->info.ps.needs_sample_positions)
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user_sgpr_info->need_ring_offsets = true;
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/* 2 user sgprs will nearly always be allocated for scratch/rings */
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if (ctx->options->supports_spill || user_sgpr_info->need_ring_offsets) {
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user_sgpr_info->sgpr_count += 2;
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}
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switch (ctx->stage) {
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case MESA_SHADER_COMPUTE:
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user_sgpr_info->sgpr_count += ctx->shader_info->info.cs.grid_components_used;
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break;
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case MESA_SHADER_FRAGMENT:
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user_sgpr_info->sgpr_count += ctx->shader_info->info.ps.needs_sample_positions;
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break;
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case MESA_SHADER_VERTEX:
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if (!ctx->is_gs_copy_shader) {
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user_sgpr_info->sgpr_count += ctx->shader_info->info.vs.has_vertex_buffers ? 2 : 0;
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if (ctx->shader_info->info.vs.needs_draw_id) {
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user_sgpr_info->sgpr_count += 3;
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} else {
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user_sgpr_info->sgpr_count += 2;
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}
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}
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if (ctx->options->key.vs.as_ls)
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user_sgpr_info->sgpr_count++;
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break;
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case MESA_SHADER_TESS_CTRL:
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user_sgpr_info->sgpr_count += 4;
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break;
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case MESA_SHADER_TESS_EVAL:
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user_sgpr_info->sgpr_count += 1;
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break;
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case MESA_SHADER_GEOMETRY:
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user_sgpr_info->sgpr_count += 2;
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break;
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default:
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break;
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}
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if (ctx->shader_info->info.needs_push_constants)
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user_sgpr_info->sgpr_count += 2;
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uint32_t remaining_sgprs = 16 - user_sgpr_info->sgpr_count;
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if (remaining_sgprs / 2 < util_bitcount(ctx->shader_info->info.desc_set_used_mask)) {
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fprintf(stderr, "radv: TODO: add support for indirect sgprs\n");
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/* need to add support for indirect descriptor sets */
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assert(0);
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} else {
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user_sgpr_info->sgpr_count += util_bitcount(ctx->shader_info->info.desc_set_used_mask) * 2;
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}
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}
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static void create_function(struct nir_to_llvm_context *ctx)
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{
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LLVMTypeRef arg_types[23];
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@ -565,21 +637,10 @@ static void create_function(struct nir_to_llvm_context *ctx)
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unsigned i;
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unsigned num_sets = ctx->options->layout ? ctx->options->layout->num_sets : 0;
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unsigned user_sgpr_idx;
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bool need_ring_offsets = false;
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struct user_sgpr_info user_sgpr_info;
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/* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
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if (ctx->stage == MESA_SHADER_GEOMETRY ||
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ctx->stage == MESA_SHADER_VERTEX ||
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ctx->stage == MESA_SHADER_TESS_CTRL ||
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ctx->stage == MESA_SHADER_TESS_EVAL ||
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ctx->is_gs_copy_shader)
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need_ring_offsets = true;
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if (ctx->stage == MESA_SHADER_FRAGMENT &&
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ctx->shader_info->info.ps.needs_sample_positions)
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need_ring_offsets = true;
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if (need_ring_offsets && !ctx->options->supports_spill) {
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allocate_user_sgprs(ctx, &user_sgpr_info);
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if (user_sgpr_info.need_ring_offsets && !ctx->options->supports_spill) {
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arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* address of rings */
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}
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@ -727,7 +788,7 @@ static void create_function(struct nir_to_llvm_context *ctx)
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arg_idx = 0;
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user_sgpr_idx = 0;
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if (ctx->options->supports_spill || need_ring_offsets) {
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if (ctx->options->supports_spill || user_sgpr_info.need_ring_offsets) {
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set_userdata_location_shader(ctx, AC_UD_SCRATCH_RING_OFFSETS, user_sgpr_idx, 2);
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user_sgpr_idx += 2;
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if (ctx->options->supports_spill) {
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