diff --git a/src/intel/compiler/brw/brw_disasm.c b/src/intel/compiler/brw/brw_disasm.c
index e6415252696..7e68f927197 100644
--- a/src/intel/compiler/brw/brw_disasm.c
+++ b/src/intel/compiler/brw/brw_disasm.c
@@ -574,8 +574,8 @@ static const char *const xe2_sampler_msg_type[] = {
    [XE2_SAMPLER_MESSAGE_SAMPLE_PO_C_LZ]            = "sample_po_c_lz",
 };
 
-static const char *const gfx5_sampler_simd_mode[7] = {
-   [BRW_SAMPLER_SIMD_MODE_SIMD4X2]   = "SIMD4x2",
+static const char *const gfx9_sampler_simd_mode[7] = {
+   [BRW_SAMPLER_SIMD_MODE_SIMD8D]    = "SIMD8D",
    [BRW_SAMPLER_SIMD_MODE_SIMD8]     = "SIMD8",
    [BRW_SAMPLER_SIMD_MODE_SIMD16]    = "SIMD16",
    [BRW_SAMPLER_SIMD_MODE_SIMD32_64] = "SIMD32/64",
@@ -2286,7 +2286,7 @@ brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa,
                               &space);
                err |= control(file, "sampler simd mode",
                               devinfo->ver >= 20 ? xe2_sampler_simd_mode :
-                                                   gfx5_sampler_simd_mode,
+                                                   gfx9_sampler_simd_mode,
                               brw_sampler_desc_simd_mode(devinfo, imm_desc),
                               &space);
                if (brw_sampler_desc_return_format(devinfo, imm_desc)) {
diff --git a/src/intel/compiler/brw/brw_eu_defines.h b/src/intel/compiler/brw/brw_eu_defines.h
index 29801caa6de..6eb2bdcdfe9 100644
--- a/src/intel/compiler/brw/brw_eu_defines.h
+++ b/src/intel/compiler/brw/brw_eu_defines.h
@@ -1242,8 +1242,7 @@ enum brw_sfid {
 #define XE2_SAMPLER_MESSAGE_SAMPLE_PO_LZ                  56
 #define XE2_SAMPLER_MESSAGE_SAMPLE_PO_C_LZ                57
 
-/* for GFX5 only */
-#define BRW_SAMPLER_SIMD_MODE_SIMD4X2                   0
+#define BRW_SAMPLER_SIMD_MODE_SIMD8D                    0
 #define BRW_SAMPLER_SIMD_MODE_SIMD8                     1
 #define BRW_SAMPLER_SIMD_MODE_SIMD16                    2
 #define BRW_SAMPLER_SIMD_MODE_SIMD32_64                 3
@@ -1256,11 +1255,6 @@ enum brw_sfid {
 #define XE2_SAMPLER_SIMD_MODE_SIMD16H                 5
 #define XE2_SAMPLER_SIMD_MODE_SIMD32H                 6
 
-/* GFX9 changes SIMD mode 0 to mean SIMD8D, but lets us get the SIMD4x2
- * behavior by setting bit 22 of dword 2 in the message header. */
-#define GFX9_SAMPLER_SIMD_MODE_SIMD8D                   0
-#define GFX9_SAMPLER_SIMD_MODE_EXTENSION_SIMD4X2        (1 << 22)
-
 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW   0
 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH  1
 #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS     2