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zink: split out msaa replication

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29789>
This commit is contained in:
Mike Blumenkrantz 2024-06-19 12:12:38 -04:00 • committed by Marge Bot
parent 453ceceec2
commit d05f6f4693
2 changed files with 58 additions and 48 deletions
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104
src/gallium/drivers/zink/zink_render_pass.c
View file

@ -761,6 +761,61 @@ begin_render_pass(struct zink_context *ctx)
return clear_buffers;
}
void
zink_render_msaa_expand(struct zink_context *ctx, uint32_t msaa_expand_mask)
{
assert(msaa_expand_mask);
bool blitting = ctx->blitting;
u_foreach_bit(i, msaa_expand_mask) {
struct zink_ctx_surface *csurf = (struct zink_ctx_surface*)ctx->fb_state.cbufs[i];
/* skip replicate blit if the image will be full-cleared */
if ((i == PIPE_MAX_COLOR_BUFS && (ctx->rp_clears_enabled & PIPE_CLEAR_DEPTHSTENCIL)) ||
(ctx->rp_clears_enabled >> 2) & BITFIELD_BIT(i)) {
csurf->transient_init |= zink_fb_clear_full_exists(ctx, i);
}
if (csurf->transient_init)
continue;
struct pipe_surface *dst_view = (struct pipe_surface*)csurf->transient;
assert(dst_view);
struct pipe_sampler_view src_templ, *src_view;
struct pipe_resource *src = ctx->fb_state.cbufs[i]->texture;
struct pipe_box dstbox;
u_box_3d(0, 0, 0, ctx->fb_state.width, ctx->fb_state.height,
1 + dst_view->u.tex.last_layer - dst_view->u.tex.first_layer, &dstbox);
util_blitter_default_src_texture(ctx->blitter, &src_templ, src, ctx->fb_state.cbufs[i]->u.tex.level);
src_view = ctx->base.create_sampler_view(&ctx->base, src, &src_templ);
zink_blit_begin(ctx, ZINK_BLIT_SAVE_FB | ZINK_BLIT_SAVE_FS | ZINK_BLIT_SAVE_TEXTURES);
ctx->blitting = false;
zink_blit_barriers(ctx, zink_resource(src), zink_resource(dst_view->texture), true);
ctx->blitting = true;
unsigned clear_mask = i == PIPE_MAX_COLOR_BUFS ?
(BITFIELD_MASK(PIPE_MAX_COLOR_BUFS) << 2) :
(PIPE_CLEAR_DEPTHSTENCIL | ((BITFIELD_MASK(PIPE_MAX_COLOR_BUFS) & ~BITFIELD_BIT(i)) << 2));
unsigned clears_enabled = ctx->clears_enabled & clear_mask;
unsigned rp_clears_enabled = ctx->rp_clears_enabled & clear_mask;
ctx->clears_enabled &= ~clear_mask;
ctx->rp_clears_enabled &= ~clear_mask;
util_blitter_blit_generic(ctx->blitter, dst_view, &dstbox,
src_view, &dstbox, ctx->fb_state.width, ctx->fb_state.height,
PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
false, false, 0, NULL);
ctx->clears_enabled = clears_enabled;
ctx->rp_clears_enabled = rp_clears_enabled;
ctx->blitting = false;
if (blitting) {
zink_blit_barriers(ctx, NULL, zink_resource(dst_view->texture), true);
zink_blit_barriers(ctx, NULL, zink_resource(src), true);
}
ctx->blitting = blitting;
pipe_sampler_view_reference(&src_view, NULL);
csurf->transient_init = true;
}
}
unsigned
zink_begin_render_pass(struct zink_context *ctx)
{
@ -772,55 +827,8 @@ zink_begin_render_pass(struct zink_context *ctx)
uint32_t rp_state = ctx->gfx_pipeline_state.rp_state;
struct zink_render_pass *rp = ctx->gfx_pipeline_state.render_pass;
struct zink_framebuffer *fb = ctx->framebuffer;
bool blitting = ctx->blitting;
u_foreach_bit(i, ctx->framebuffer->rp->state.msaa_expand_mask) {
struct zink_ctx_surface *csurf = (struct zink_ctx_surface*)ctx->fb_state.cbufs[i];
/* skip replicate blit if the image will be full-cleared */
if ((i == PIPE_MAX_COLOR_BUFS && (ctx->rp_clears_enabled & PIPE_CLEAR_DEPTHSTENCIL)) ||
(ctx->rp_clears_enabled >> 2) & BITFIELD_BIT(i)) {
csurf->transient_init |= zink_fb_clear_full_exists(ctx, i);
}
if (csurf->transient_init)
continue;
struct pipe_surface *dst_view = (struct pipe_surface*)csurf->transient;
assert(dst_view);
struct pipe_sampler_view src_templ, *src_view;
struct pipe_resource *src = ctx->fb_state.cbufs[i]->texture;
struct pipe_box dstbox;
u_box_3d(0, 0, 0, ctx->fb_state.width, ctx->fb_state.height,
1 + dst_view->u.tex.last_layer - dst_view->u.tex.first_layer, &dstbox);
util_blitter_default_src_texture(ctx->blitter, &src_templ, src, ctx->fb_state.cbufs[i]->u.tex.level);
src_view = ctx->base.create_sampler_view(&ctx->base, src, &src_templ);
zink_blit_begin(ctx, ZINK_BLIT_SAVE_FB | ZINK_BLIT_SAVE_FS | ZINK_BLIT_SAVE_TEXTURES);
ctx->blitting = false;
zink_blit_barriers(ctx, zink_resource(src), zink_resource(dst_view->texture), true);
ctx->blitting = true;
unsigned clear_mask = i == PIPE_MAX_COLOR_BUFS ?
(BITFIELD_MASK(PIPE_MAX_COLOR_BUFS) << 2) :
(PIPE_CLEAR_DEPTHSTENCIL | ((BITFIELD_MASK(PIPE_MAX_COLOR_BUFS) & ~BITFIELD_BIT(i)) << 2));
unsigned clears_enabled = ctx->clears_enabled & clear_mask;
unsigned rp_clears_enabled = ctx->rp_clears_enabled & clear_mask;
ctx->clears_enabled &= ~clear_mask;
ctx->rp_clears_enabled &= ~clear_mask;
util_blitter_blit_generic(ctx->blitter, dst_view, &dstbox,
src_view, &dstbox, ctx->fb_state.width, ctx->fb_state.height,
PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
false, false, 0, NULL);
ctx->clears_enabled = clears_enabled;
ctx->rp_clears_enabled = rp_clears_enabled;
ctx->blitting = false;
if (blitting) {
zink_blit_barriers(ctx, NULL, zink_resource(dst_view->texture), true);
zink_blit_barriers(ctx, NULL, zink_resource(src), true);
}
ctx->blitting = blitting;
pipe_sampler_view_reference(&src_view, NULL);
csurf->transient_init = true;
}
zink_render_msaa_expand(ctx, ctx->framebuffer->rp->state.msaa_expand_mask);
ctx->rp_layout_changed = ctx->rp_loadop_changed = false;
ctx->fb_changed = ctx->rp_changed = false;
ctx->gfx_pipeline_state.rp_state = rp_state;

2
src/gallium/drivers/zink/zink_render_pass.h
View file

@ -59,4 +59,6 @@ void
zink_tc_init_zs_attachment(struct zink_context *ctx, const struct tc_renderpass_info *info, struct zink_rt_attrib *rt);
void
zink_tc_init_color_attachment(struct zink_context *ctx, const struct tc_renderpass_info *info, unsigned i, struct zink_rt_attrib *rt);
void
zink_render_msaa_expand(struct zink_context *ctx, uint32_t msaa_expand_mask);
#endif