diff --git a/.pick_status.json b/.pick_status.json
index 07fc8ac57f3..d1cdd8bf6c3 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -664,7 +664,7 @@
         "description": "radeonsi: ensure TC_L2_dirty is set if we don't sync after internal SSBO blits",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "f703dfd1bb8c22b6791dd95c7de270e176452b4b",
         "notes": null
diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c
index 783ef9a8dbe..0336d7ceefe 100644
--- a/src/gallium/drivers/radeonsi/si_compute_blit.c
+++ b/src/gallium/drivers/radeonsi/si_compute_blit.c
@@ -187,11 +187,9 @@ void si_launch_grid_internal_ssbos(struct si_context *sctx, struct pipe_grid_inf
    si_launch_grid_internal(sctx, info, shader, flags);
 
    /* Do cache flushing at the end. */
-   if (get_cache_policy(sctx, coher, 0) == L2_BYPASS) {
-      if (flags & SI_OP_SYNC_AFTER) {
-         sctx->flags |= SI_CONTEXT_WB_L2;
-         si_mark_atom_dirty(sctx, &sctx->atoms.s.cache_flush);
-      }
+   if (flags & SI_OP_SYNC_AFTER && get_cache_policy(sctx, coher, 0) == L2_BYPASS) {
+      sctx->flags |= SI_CONTEXT_WB_L2;
+      si_mark_atom_dirty(sctx, &sctx->atoms.s.cache_flush);
    } else {
       while (writeable_bitmask)
          si_resource(buffers[u_bit_scan(&writeable_bitmask)].buffer)->TC_L2_dirty = true;