fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-01 11:50:09 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

isl/state: Don't force-disable L2 bypass for everything

Browse source 
We already set the bit in the few cases where it's required by the docs so
there's no need to set it all the time.  This has no noticable perf impact
for Dota 2 on Vulkan with the time demo I have.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Jason Ekstrand 2016-06-04 20:48:55 -07:00
parent 87f0ffa646
commit d050ffbce9
1 changed files with 0 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/intel/isl/isl_surface_state.c
View file

@ -310,10 +310,6 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
TILEWALK_YMAJOR;
#endif
#if GEN_GEN >= 8
s.SamplerL2BypassModeDisable = true;
#endif
#if GEN_GEN >= 8
s.RenderCacheReadWriteMode = WriteOnlyCache;
#else
@ -431,7 +427,6 @@ isl_genX(buffer_fill_state_s)(void *state,
#endif
#if (GEN_GEN >= 8)
.SamplerL2BypassModeDisable = true,
.RenderCacheReadWriteMode = WriteOnlyCache,
#else
.RenderCacheReadWriteMode = 0,