From d04b50b4de63cc76b2ac2a45e9e63728ae155b36 Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Wed, 6 Feb 2013 13:54:02 -0500 Subject: [PATCH] r600g: fix slice tile max for compressed texture and async dma Was using the pixel size instead of the number of block for the slice tile max computation which resulted in dma writing at wrong address. Signed-off-by: Jerome Glisse --- src/gallium/drivers/r600/evergreen_state.c | 6 ++++-- src/gallium/drivers/r600/r600_state.c | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 5dd8b130e9e..ad2f7313c23 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -3506,7 +3506,8 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx, if (dst_mode == RADEON_SURF_MODE_LINEAR) { /* T2L */ array_mode = evergreen_array_mode(src_mode); - slice_tile_max = (((pitch * rsrc->surface.level[src_level].npix_y) >> 6) / bpp) - 1; + slice_tile_max = (rsrc->surface.level[src_level].nblk_x * rsrc->surface.level[src_level].nblk_y) >> 6; + slice_tile_max = slice_tile_max ? slice_tile_max - 1 : 0; /* linear height must be the same as the slice tile max height, it's ok even * if the linear destination/source have smaller heigh as the size of the * dma packet will be using the copy_height which is always smaller or equal @@ -3530,7 +3531,8 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx, } else { /* L2T */ array_mode = evergreen_array_mode(dst_mode); - slice_tile_max = (((pitch * rdst->surface.level[dst_level].npix_y) >> 6) / bpp) - 1; + slice_tile_max = (rdst->surface.level[dst_level].nblk_x * rdst->surface.level[dst_level].nblk_y) >> 6; + slice_tile_max = slice_tile_max ? slice_tile_max - 1 : 0; /* linear height must be the same as the slice tile max height, it's ok even * if the linear destination/source have smaller heigh as the size of the * dma packet will be using the copy_height which is always smaller or equal diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 44cd00ead8a..bf194f54d60 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -3001,7 +3001,8 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx, if (dst_mode == RADEON_SURF_MODE_LINEAR) { /* T2L */ array_mode = r600_array_mode(src_mode); - slice_tile_max = (((pitch * rsrc->surface.level[src_level].npix_y) >> 6) / bpp) - 1; + slice_tile_max = (rsrc->surface.level[src_level].nblk_x * rsrc->surface.level[src_level].nblk_y) >> 6; + slice_tile_max = slice_tile_max ? slice_tile_max - 1 : 0; /* linear height must be the same as the slice tile max height, it's ok even * if the linear destination/source have smaller heigh as the size of the * dma packet will be using the copy_height which is always smaller or equal @@ -3019,7 +3020,8 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx, } else { /* L2T */ array_mode = r600_array_mode(dst_mode); - slice_tile_max = (((pitch * rdst->surface.level[dst_level].npix_y) >> 6) / bpp) - 1; + slice_tile_max = (rdst->surface.level[dst_level].nblk_x * rdst->surface.level[dst_level].nblk_y) >> 6; + slice_tile_max = slice_tile_max ? slice_tile_max - 1 : 0; /* linear height must be the same as the slice tile max height, it's ok even * if the linear destination/source have smaller heigh as the size of the * dma packet will be using the copy_height which is always smaller or equal