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nak: Fix encoding of dsetp with RZ on SM70+
The `as_reg().is_some()` check returns false when src[1].src_ref is Zero but we want to handle that as a register case. Replace it with a match instead. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26587>
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1 changed files with 19 additions and 16 deletions
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@ -613,22 +613,25 @@ impl SM70Instr {
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}
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fn encode_dsetp(&mut self, op: &OpDSetP) {
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if op.srcs[1].src_ref.as_reg().is_some() {
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self.encode_alu(
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0x02a,
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None,
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ALUSrc::from_src(&op.srcs[0]),
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ALUSrc::from_src(&op.srcs[1]),
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ALUSrc::None,
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);
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} else {
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self.encode_alu(
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0x02a,
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None,
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ALUSrc::from_src(&op.srcs[0]),
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ALUSrc::None,
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ALUSrc::from_src(&op.srcs[1]),
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);
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match op.srcs[1].src_ref {
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SrcRef::Reg(_) | SrcRef::Zero => {
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self.encode_alu(
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0x02a,
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None,
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ALUSrc::from_src(&op.srcs[0]),
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ALUSrc::from_src(&op.srcs[1]),
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ALUSrc::None,
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);
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}
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_ => {
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self.encode_alu(
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0x02a,
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None,
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ALUSrc::from_src(&op.srcs[0]),
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ALUSrc::None,
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ALUSrc::from_src(&op.srcs[1]),
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);
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}
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}
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self.set_pred_set_op(74..76, op.set_op);
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