diff --git a/src/asahi/vulkan/hk_cmd_buffer.c b/src/asahi/vulkan/hk_cmd_buffer.c
index a1e5aad4e71..a04ac1490bd 100644
--- a/src/asahi/vulkan/hk_cmd_buffer.c
+++ b/src/asahi/vulkan/hk_cmd_buffer.c
@@ -649,7 +649,7 @@ hk_reserve_scratch(struct hk_cmd_buffer *cmd, struct hk_cs *cs,
       cs->scratch.fs.main = true;
       cs->scratch.fs.preamble = MAX2(cs->scratch.fs.preamble, preamble_size);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       cs->scratch.vs.main = true;
       cs->scratch.vs.preamble = MAX2(cs->scratch.vs.preamble, preamble_size);
       break;
diff --git a/src/asahi/vulkan/hk_device.h b/src/asahi/vulkan/hk_device.h
index 2744c103085..8c774727f38 100644
--- a/src/asahi/vulkan/hk_device.h
+++ b/src/asahi/vulkan/hk_device.h
@@ -144,7 +144,7 @@ hk_device_scratch_locked(struct hk_device *dev, enum pipe_shader_type stage)
    switch (stage) {
    case PIPE_SHADER_FRAGMENT:
       return &dev->scratch.fs;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return &dev->scratch.vs;
    default:
       return &dev->scratch.cs;
diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c b/src/gallium/auxiliary/cso_cache/cso_context.c
index c57bc357ee5..6c46aa4684b 100644
--- a/src/gallium/auxiliary/cso_cache/cso_context.c
+++ b/src/gallium/auxiliary/cso_cache/cso_context.c
@@ -422,7 +422,7 @@ cso_unbind_context(struct cso_context *cso)
       ctx->base.pipe->bind_fs_state(ctx->base.pipe, NULL);
       ctx->base.pipe->set_constant_buffer(ctx->base.pipe, PIPE_SHADER_FRAGMENT, 0, false, NULL);
       ctx->base.pipe->bind_vs_state(ctx->base.pipe, NULL);
-      ctx->base.pipe->set_constant_buffer(ctx->base.pipe, PIPE_SHADER_VERTEX, 0, false, NULL);
+      ctx->base.pipe->set_constant_buffer(ctx->base.pipe, MESA_SHADER_VERTEX, 0, false, NULL);
       if (ctx->has_geometry_shader) {
          ctx->base.pipe->bind_gs_state(ctx->base.pipe, NULL);
       }
@@ -1750,7 +1750,7 @@ cso_restore_state(struct cso_context *ctx, unsigned unbind)
    if (state_mask & CSO_BIT_VIEWPORT)
       cso_restore_viewport(cso);
    if (unbind & CSO_UNBIND_VS_CONSTANTS)
-      cso->base.pipe->set_constant_buffer(cso->base.pipe, PIPE_SHADER_VERTEX, 0, false, NULL);
+      cso->base.pipe->set_constant_buffer(cso->base.pipe, MESA_SHADER_VERTEX, 0, false, NULL);
    if (unbind & CSO_UNBIND_FS_CONSTANTS)
       cso->base.pipe->set_constant_buffer(cso->base.pipe, PIPE_SHADER_FRAGMENT, 0, false, NULL);
    if (state_mask & CSO_BIT_VERTEX_ELEMENTS)
diff --git a/src/gallium/auxiliary/draw/draw_context.c b/src/gallium/auxiliary/draw/draw_context.c
index 9e57b56dd25..152be77c33a 100644
--- a/src/gallium/auxiliary/draw/draw_context.c
+++ b/src/gallium/auxiliary/draw/draw_context.c
@@ -459,7 +459,7 @@ draw_set_mapped_constant_buffer(struct draw_context *draw,
                                 const void *buffer,
                                 unsigned size)
 {
-   assert(shader_type == PIPE_SHADER_VERTEX ||
+   assert(shader_type == MESA_SHADER_VERTEX ||
                 shader_type == PIPE_SHADER_GEOMETRY ||
                 shader_type == PIPE_SHADER_TESS_CTRL ||
                 shader_type == PIPE_SHADER_TESS_EVAL);
@@ -478,7 +478,7 @@ draw_set_mapped_shader_buffer(struct draw_context *draw,
                               const void *buffer,
                               unsigned size)
 {
-   assert(shader_type == PIPE_SHADER_VERTEX ||
+   assert(shader_type == MESA_SHADER_VERTEX ||
                 shader_type == PIPE_SHADER_GEOMETRY ||
                 shader_type == PIPE_SHADER_TESS_CTRL ||
                 shader_type == PIPE_SHADER_TESS_EVAL);
@@ -760,7 +760,7 @@ draw_texture_sampler(struct draw_context *draw,
                      struct tgsi_sampler *sampler)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       draw->vs.tgsi.sampler = sampler;
       break;
    case PIPE_SHADER_GEOMETRY:
@@ -784,7 +784,7 @@ draw_image(struct draw_context *draw,
            struct tgsi_image *image)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       draw->vs.tgsi.image = image;
       break;
    case PIPE_SHADER_GEOMETRY:
@@ -808,7 +808,7 @@ draw_buffer(struct draw_context *draw,
             struct tgsi_buffer *buffer)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       draw->vs.tgsi.buffer = buffer;
       break;
    case PIPE_SHADER_GEOMETRY:
diff --git a/src/gallium/auxiliary/draw/draw_llvm.c b/src/gallium/auxiliary/draw/draw_llvm.c
index 00756292376..1457e88558a 100644
--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -2095,11 +2095,11 @@ draw_llvm_make_variant_key(struct draw_llvm *llvm, char *store)
 
    for (unsigned i = 0 ; i < key->nr_samplers; i++) {
       lp_sampler_static_sampler_state(&draw_sampler[i].sampler_state,
-                                      llvm->draw->samplers[PIPE_SHADER_VERTEX][i]);
+                                      llvm->draw->samplers[MESA_SHADER_VERTEX][i]);
    }
    for (unsigned i = 0 ; i < key->nr_sampler_views; i++) {
       lp_sampler_static_texture_state(&draw_sampler[i].texture_state,
-                                      llvm->draw->sampler_views[PIPE_SHADER_VERTEX][i]);
+                                      llvm->draw->sampler_views[MESA_SHADER_VERTEX][i]);
    }
 
    draw_image = draw_llvm_variant_key_images(key);
@@ -2107,7 +2107,7 @@ draw_llvm_make_variant_key(struct draw_llvm *llvm, char *store)
           key->nr_images * sizeof *draw_image);
    for (unsigned i = 0; i < key->nr_images; i++) {
       lp_sampler_static_texture_state_image(&draw_image[i].image_state,
-                                            llvm->draw->images[PIPE_SHADER_VERTEX][i]);
+                                            llvm->draw->images[MESA_SHADER_VERTEX][i]);
    }
    return key;
 }
diff --git a/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c b/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c
index 143b48b55c5..6640a6fda7a 100644
--- a/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c
+++ b/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline.c
@@ -270,7 +270,7 @@ fetch_pipeline_generic(struct draw_pt_middle_end *middle,
     */
    if (fpme->opt & PT_SHADE) {
       draw_vertex_shader_run(vshader,
-                             draw->pt.user.constants[PIPE_SHADER_VERTEX],
+                             draw->pt.user.constants[MESA_SHADER_VERTEX],
                              fetch_info,
                              vert_info,
                              &vs_vert_info);
diff --git a/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c b/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c
index cb79198f980..55428f13df7 100644
--- a/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c
@@ -431,7 +431,7 @@ llvm_middle_end_bind_parameters(struct draw_pt_middle_end *middle)
    struct draw_llvm *llvm = fpme->llvm;
    unsigned i;
 
-   for (enum pipe_shader_type shader_type = PIPE_SHADER_VERTEX; shader_type <= PIPE_SHADER_GEOMETRY; shader_type++) {
+   for (enum pipe_shader_type shader_type = MESA_SHADER_VERTEX; shader_type <= PIPE_SHADER_GEOMETRY; shader_type++) {
       for (i = 0; i < ARRAY_SIZE(llvm->jit_resources[shader_type].constants); ++i) {
          /*
           * There could be a potential issue with rounding this up, as the
@@ -554,7 +554,7 @@ llvm_pipeline_generic(struct draw_pt_middle_end *middle,
       }
       /* Run vertex fetch shader */
       clipped = fpme->current_variant->jit_func(&fpme->llvm->vs_jit_context,
-                                                &fpme->llvm->jit_resources[PIPE_SHADER_VERTEX],
+                                                &fpme->llvm->jit_resources[MESA_SHADER_VERTEX],
                                                 llvm_vert_info.verts,
                                                 draw->pt.user.vbuffer,
                                                 fetch_info->count,
diff --git a/src/gallium/auxiliary/draw/draw_vs.c b/src/gallium/auxiliary/draw/draw_vs.c
index d820c460bd4..bff95053642 100644
--- a/src/gallium/auxiliary/draw/draw_vs.c
+++ b/src/gallium/auxiliary/draw/draw_vs.c
@@ -70,7 +70,7 @@ draw_create_vertex_shader(struct draw_context *draw,
    if (draw->pt.middle.llvm) {
       struct pipe_screen *screen = draw->pipe->screen;
       if (shader->type == PIPE_SHADER_IR_NIR &&
-          !screen->shader_caps[PIPE_SHADER_VERTEX].integers) {
+          !screen->shader_caps[MESA_SHADER_VERTEX].integers) {
         state.type = PIPE_SHADER_IR_TGSI;
         state.tokens = nir_to_tgsi(shader->ir.nir, screen);
         is_allocated = true;
@@ -163,7 +163,7 @@ draw_vs_init(struct draw_context *draw)
    draw->dump_vs = debug_get_option_gallium_dump_vs();
 
    if (!draw->llvm) {
-      draw->vs.tgsi.machine = tgsi_exec_machine_create(PIPE_SHADER_VERTEX);
+      draw->vs.tgsi.machine = tgsi_exec_machine_create(MESA_SHADER_VERTEX);
       if (!draw->vs.tgsi.machine)
          return false;
    }
diff --git a/src/gallium/auxiliary/draw/draw_vs_variant.c b/src/gallium/auxiliary/draw/draw_vs_variant.c
index 0aedefd2b53..98e6c63679f 100644
--- a/src/gallium/auxiliary/draw/draw_vs_variant.c
+++ b/src/gallium/auxiliary/draw/draw_vs_variant.c
@@ -175,7 +175,7 @@ vsvg_run_elts(struct draw_vs_variant *variant,
    vsvg->base.vs->run_linear(vsvg->base.vs,
                              temp_buffer,
                              temp_buffer,
-                             vsvg->base.vs->draw->pt.user.constants[PIPE_SHADER_VERTEX],
+                             vsvg->base.vs->draw->pt.user.constants[MESA_SHADER_VERTEX],
                              count,
                              temp_vertex_stride,
                              temp_vertex_stride, NULL);
@@ -238,7 +238,7 @@ vsvg_run_linear(struct draw_vs_variant *variant,
    vsvg->base.vs->run_linear(vsvg->base.vs,
                              temp_buffer,
                              temp_buffer,
-                             vsvg->base.vs->draw->pt.user.constants[PIPE_SHADER_VERTEX],
+                             vsvg->base.vs->draw->pt.user.constants[MESA_SHADER_VERTEX],
                              count,
                              temp_vertex_stride,
                              temp_vertex_stride, NULL);
diff --git a/src/gallium/auxiliary/driver_ddebug/dd_draw.c b/src/gallium/auxiliary/driver_ddebug/dd_draw.c
index 0044bceac27..0b98f6462fb 100644
--- a/src/gallium/auxiliary/driver_ddebug/dd_draw.c
+++ b/src/gallium/auxiliary/driver_ddebug/dd_draw.c
@@ -159,8 +159,8 @@ dd_num_active_viewports(struct dd_draw_state *dstate)
       tokens = dstate->shaders[PIPE_SHADER_GEOMETRY]->state.shader.tokens;
    else if (dstate->shaders[PIPE_SHADER_TESS_EVAL])
       tokens = dstate->shaders[PIPE_SHADER_TESS_EVAL]->state.shader.tokens;
-   else if (dstate->shaders[PIPE_SHADER_VERTEX])
-      tokens = dstate->shaders[PIPE_SHADER_VERTEX]->state.shader.tokens;
+   else if (dstate->shaders[MESA_SHADER_VERTEX])
+      tokens = dstate->shaders[MESA_SHADER_VERTEX]->state.shader.tokens;
    else
       return 1;
 
@@ -264,7 +264,7 @@ dd_dump_shader(struct dd_draw_state *dstate, enum pipe_shader_type sh, FILE *f)
    int i;
    const char *shader_str[PIPE_SHADER_TYPES];
 
-   shader_str[PIPE_SHADER_VERTEX] = "VERTEX";
+   shader_str[MESA_SHADER_VERTEX] = "VERTEX";
    shader_str[PIPE_SHADER_TESS_CTRL] = "TESS_CTRL";
    shader_str[PIPE_SHADER_TESS_EVAL] = "TESS_EVAL";
    shader_str[PIPE_SHADER_GEOMETRY] = "GEOMETRY";
diff --git a/src/gallium/auxiliary/hud/hud_context.c b/src/gallium/auxiliary/hud/hud_context.c
index 49649c5f6a7..3fd16290ef5 100644
--- a/src/gallium/auxiliary/hud/hud_context.c
+++ b/src/gallium/auxiliary/hud/hud_context.c
@@ -106,7 +106,7 @@ hud_draw_colored_prims(struct hud_context *hud, unsigned prim,
    hud->constants.translate[1] = (float) (yoffset * hud_scale);
    hud->constants.scale[0] = hud_scale;
    hud->constants.scale[1] = yscale * hud_scale;
-   pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, false, &hud->constbuf);
+   pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &hud->constbuf);
 
    u_upload_data(hud->pipe->stream_uploader, 0,
                  num_vertices * 2 * sizeof(float), 16, buffer,
@@ -580,7 +580,7 @@ hud_draw_results(struct hud_context *hud, struct pipe_resource *tex)
    pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0, 1, 0,
                            &hud->font_sampler_view);
    cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, 1, sampler_states);
-   pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, false, &hud->constbuf);
+   pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &hud->constbuf);
 
    /* draw accumulated vertices for background quads */
    cso_set_blend(cso, &hud->alpha_blend);
@@ -596,7 +596,7 @@ hud_draw_results(struct hud_context *hud, struct pipe_resource *tex)
       hud->constants.scale[0] = hud_scale;
       hud->constants.scale[1] = hud_scale;
 
-      pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, false, &hud->constbuf);
+      pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &hud->constbuf);
 
       cso_set_vertex_buffers(cso, 1, true, &hud->bg.vbuf);
       cso_draw_arrays(cso, MESA_PRIM_QUADS, 0, hud->bg.num_vertices);
@@ -632,7 +632,7 @@ hud_draw_results(struct hud_context *hud, struct pipe_resource *tex)
    hud->constants.translate[1] = 0;
    hud->constants.scale[0] = hud_scale;
    hud->constants.scale[1] = hud_scale;
-   pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, false, &hud->constbuf);
+   pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &hud->constbuf);
 
    if (hud->whitelines.num_vertices) {
       cso_set_vertex_shader_handle(cso, hud->vs_color);
diff --git a/src/gallium/auxiliary/postprocess/pp_mlaa.c b/src/gallium/auxiliary/postprocess/pp_mlaa.c
index f45089b611a..82ce9c4d9e3 100644
--- a/src/gallium/auxiliary/postprocess/pp_mlaa.c
+++ b/src/gallium/auxiliary/postprocess/pp_mlaa.c
@@ -104,7 +104,7 @@ pp_jimenezmlaa_run(struct pp_queue_t *ppq, struct pipe_resource *in,
    cb.user_buffer = constants;
 
    struct pipe_context *pipe = ppq->p->pipe;
-   pipe->set_constant_buffer(pipe, PIPE_SHADER_VERTEX, 0, false, &cb);
+   pipe->set_constant_buffer(pipe, MESA_SHADER_VERTEX, 0, false, &cb);
    pipe->set_constant_buffer(pipe, PIPE_SHADER_FRAGMENT, 0, false, &cb);
 
    mstencil.stencil[0].enabled = 1;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h b/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
index 8d07a4ddaf7..1edd177b0f1 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
@@ -61,7 +61,7 @@ tgsi_get_interp_mode(enum glsl_interp_mode mode, bool color);
 static inline enum pipe_shader_type
 pipe_shader_type_from_mesa(gl_shader_stage stage)
 {
-   STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_VERTEX == PIPE_SHADER_VERTEX);
+   STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_VERTEX == MESA_SHADER_VERTEX);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_FRAGMENT == PIPE_SHADER_FRAGMENT);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_CTRL == PIPE_SHADER_TESS_CTRL);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_EVAL == PIPE_SHADER_TESS_EVAL);
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index b21438de8c5..a5b7aafed1f 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -611,7 +611,7 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
    }
    procType = parse.FullHeader.Processor.Processor;
    assert(procType == PIPE_SHADER_FRAGMENT ||
-          procType == PIPE_SHADER_VERTEX ||
+          procType == MESA_SHADER_VERTEX ||
           procType == PIPE_SHADER_GEOMETRY ||
           procType == PIPE_SHADER_TESS_CTRL ||
           procType == PIPE_SHADER_TESS_EVAL ||
diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c
index 11bfddfd726..a4a0807ae4c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_text.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_text.c
@@ -335,7 +335,7 @@ static bool parse_header( struct translate_ctx *ctx )
    if (str_match_nocase_whole( &ctx->cur, "FRAG" ))
       processor = PIPE_SHADER_FRAGMENT;
    else if (str_match_nocase_whole( &ctx->cur, "VERT" ))
-      processor = PIPE_SHADER_VERTEX;
+      processor = MESA_SHADER_VERTEX;
    else if (str_match_nocase_whole( &ctx->cur, "GEOM" ))
       processor = PIPE_SHADER_GEOMETRY;
    else if (str_match_nocase_whole( &ctx->cur, "TESS_CTRL" ))
@@ -1273,7 +1273,7 @@ static bool parse_declaration( struct translate_ctx *ctx )
    }
 
    is_vs_input = (file == TGSI_FILE_INPUT &&
-                  ctx->processor == PIPE_SHADER_VERTEX);
+                  ctx->processor == MESA_SHADER_VERTEX);
 
    cur = ctx->cur;
    eat_opt_white( &cur );
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index 89d3ed22a09..f6c2f720af7 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -357,7 +357,7 @@ struct ureg_src
 ureg_DECL_vs_input( struct ureg_program *ureg,
                     unsigned index )
 {
-   assert(ureg->processor == PIPE_SHADER_VERTEX);
+   assert(ureg->processor == MESA_SHADER_VERTEX);
    assert(index / 32 < ARRAY_SIZE(ureg->vs_inputs));
 
    ureg->vs_inputs[index/32] |= 1 << (index % 32);
@@ -1856,7 +1856,7 @@ static void emit_decls( struct ureg_program *ureg )
     */
    qsort(ureg->input, ureg->nr_inputs, sizeof(ureg->input[0]), input_sort);
 
-   if (ureg->processor == PIPE_SHADER_VERTEX) {
+   if (ureg->processor == MESA_SHADER_VERTEX) {
       for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
          if (ureg->vs_inputs[i/32] & (1u << (i%32))) {
             emit_decl_range( ureg, TGSI_FILE_INPUT, i, 1 );
@@ -2113,7 +2113,7 @@ const struct tgsi_token *ureg_finalize( struct ureg_program *ureg )
    const struct tgsi_token *tokens;
 
    switch (ureg->processor) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
    case PIPE_SHADER_TESS_EVAL:
       ureg_property(ureg, TGSI_PROPERTY_NEXT_SHADER,
                     ureg->next_shader_processor == -1 ?
@@ -2182,7 +2182,7 @@ void *ureg_create_shader( struct ureg_program *ureg,
       state.stream_output = *so;
 
    switch (ureg->processor) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return pipe->create_vs_state(pipe, &state);
    case PIPE_SHADER_TESS_CTRL:
       return pipe->create_tcs_state(pipe, &state);
diff --git a/src/gallium/auxiliary/util/u_live_shader_cache.c b/src/gallium/auxiliary/util/u_live_shader_cache.c
index b1052941f75..7f475ce4792 100644
--- a/src/gallium/auxiliary/util/u_live_shader_cache.c
+++ b/src/gallium/auxiliary/util/u_live_shader_cache.c
@@ -102,7 +102,7 @@ util_live_shader_cache_get(struct pipe_context *ctx,
    unsigned char sha1[20];
    _mesa_sha1_init(&sha1_ctx);
    _mesa_sha1_update(&sha1_ctx, ir_binary, ir_size);
-   if ((stage == PIPE_SHADER_VERTEX ||
+   if ((stage == MESA_SHADER_VERTEX ||
         stage == PIPE_SHADER_TESS_EVAL ||
         stage == PIPE_SHADER_GEOMETRY) &&
        state->stream_output.num_outputs) {
diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c b/src/gallium/auxiliary/util/u_simple_shaders.c
index 2f817309aa6..d66b5342d21 100644
--- a/src/gallium/auxiliary/util/u_simple_shaders.c
+++ b/src/gallium/auxiliary/util/u_simple_shaders.c
@@ -80,7 +80,7 @@ util_make_vertex_passthrough_shader_with_so(struct pipe_context *pipe,
    struct ureg_program *ureg;
    unsigned i;
 
-   ureg = ureg_create( PIPE_SHADER_VERTEX );
+   ureg = ureg_create( MESA_SHADER_VERTEX );
    if (!ureg)
       return NULL;
 
diff --git a/src/gallium/auxiliary/util/u_threaded_context.c b/src/gallium/auxiliary/util/u_threaded_context.c
index 421184c21a4..76de75700af 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -910,7 +910,7 @@ tc_add_all_gfx_bindings_to_buffer_list(struct threaded_context *tc)
    if (tc->seen_streamout_buffers)
       tc_add_bindings_to_buffer_list(buffer_list, tc->streamout_buffers, PIPE_MAX_SO_BUFFERS);
 
-   tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_VERTEX);
+   tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_VERTEX);
    tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_FRAGMENT);
 
    if (tc->seen_tcs)
@@ -954,7 +954,7 @@ tc_rebind_buffer(struct threaded_context *tc, uint32_t old_id, uint32_t new_id,
    }
    unsigned rebound = vbo + so;
 
-   rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_VERTEX, rebind_mask);
+   rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_VERTEX, rebind_mask);
    rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_FRAGMENT, rebind_mask);
 
    if (tc->seen_tcs)
@@ -1006,7 +1006,7 @@ tc_is_buffer_bound_for_write(struct threaded_context *tc, uint32_t id)
                                     BITFIELD_MASK(PIPE_MAX_SO_BUFFERS)))
       return true;
 
-   if (tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_VERTEX) ||
+   if (tc_is_buffer_shader_bound_for_write(tc, id, MESA_SHADER_VERTEX) ||
        tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_FRAGMENT) ||
        tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_COMPUTE))
       return true;
diff --git a/src/gallium/auxiliary/vl/vl_bicubic_filter.c b/src/gallium/auxiliary/vl/vl_bicubic_filter.c
index 95fc7621b31..06dba0ef5d7 100644
--- a/src/gallium/auxiliary/vl/vl_bicubic_filter.c
+++ b/src/gallium/auxiliary/vl/vl_bicubic_filter.c
@@ -54,7 +54,7 @@ create_vert_shader(struct vl_bicubic_filter *filter)
    struct ureg_src i_vpos;
    struct ureg_dst o_vpos, o_vtex;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_compositor_gfx.c b/src/gallium/auxiliary/vl/vl_compositor_gfx.c
index 688ea3d7ac8..2d261fa5236 100644
--- a/src/gallium/auxiliary/vl/vl_compositor_gfx.c
+++ b/src/gallium/auxiliary/vl/vl_compositor_gfx.c
@@ -60,7 +60,7 @@ create_vert_shader(struct vl_compositor *c)
    struct ureg_dst o_vpos, o_vtex, o_color;
    struct ureg_dst o_vtop, o_vbottom;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_deint_filter.c b/src/gallium/auxiliary/vl/vl_deint_filter.c
index 12b5a3ba8d4..833d0c97d97 100644
--- a/src/gallium/auxiliary/vl/vl_deint_filter.c
+++ b/src/gallium/auxiliary/vl/vl_deint_filter.c
@@ -68,7 +68,7 @@ create_vert_shader(struct vl_deint_filter *filter)
    struct ureg_src i_vpos;
    struct ureg_dst o_vpos, o_vtex;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_idct.c b/src/gallium/auxiliary/vl/vl_idct.c
index cda609cb508..cff2b13405e 100644
--- a/src/gallium/auxiliary/vl/vl_idct.c
+++ b/src/gallium/auxiliary/vl/vl_idct.c
@@ -148,7 +148,7 @@ create_mismatch_vert_shader(struct vl_idct *idct)
    struct ureg_dst t_tex;
    struct ureg_dst o_vpos, o_addr[2];
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
@@ -264,7 +264,7 @@ create_stage1_vert_shader(struct vl_idct *idct)
    struct ureg_dst t_tex, t_start;
    struct ureg_dst o_vpos, o_l_addr[2], o_r_addr[2];
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_matrix_filter.c b/src/gallium/auxiliary/vl/vl_matrix_filter.c
index 7ca86aa4a40..15a27d0e1e4 100644
--- a/src/gallium/auxiliary/vl/vl_matrix_filter.c
+++ b/src/gallium/auxiliary/vl/vl_matrix_filter.c
@@ -52,7 +52,7 @@ create_vert_shader(struct vl_matrix_filter *filter)
    struct ureg_src i_vpos;
    struct ureg_dst o_vpos, o_vtex;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_mc.c b/src/gallium/auxiliary/vl/vl_mc.c
index ef420592e77..8f26cddf4f7 100644
--- a/src/gallium/auxiliary/vl/vl_mc.c
+++ b/src/gallium/auxiliary/vl/vl_mc.c
@@ -112,7 +112,7 @@ create_ref_vert_shader(struct vl_mc *r)
    struct ureg_dst o_vmv[2];
    unsigned i;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
@@ -241,7 +241,7 @@ create_ycbcr_vert_shader(struct vl_mc *r, vl_mc_ycbcr_vert_shader vs_callback, v
 
    unsigned label;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_median_filter.c b/src/gallium/auxiliary/vl/vl_median_filter.c
index 3a578726d8c..8576fd94c13 100644
--- a/src/gallium/auxiliary/vl/vl_median_filter.c
+++ b/src/gallium/auxiliary/vl/vl_median_filter.c
@@ -50,7 +50,7 @@ create_vert_shader(struct vl_median_filter *filter)
    struct ureg_src i_vpos;
    struct ureg_dst o_vpos, o_vtex;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/auxiliary/vl/vl_zscan.c b/src/gallium/auxiliary/vl/vl_zscan.c
index e38963e1770..752fb339b4d 100644
--- a/src/gallium/auxiliary/vl/vl_zscan.c
+++ b/src/gallium/auxiliary/vl/vl_zscan.c
@@ -60,7 +60,7 @@ create_vert_shader(struct vl_zscan *zscan)
    struct ureg_dst *o_vtex;
    unsigned i;
 
-   shader = ureg_create(PIPE_SHADER_VERTEX);
+   shader = ureg_create(MESA_SHADER_VERTEX);
    if (!shader)
       return NULL;
 
diff --git a/src/gallium/drivers/asahi/agx_blit.c b/src/gallium/drivers/asahi/agx_blit.c
index 14c524d9d30..d386ea9e82e 100644
--- a/src/gallium/drivers/asahi/agx_blit.c
+++ b/src/gallium/drivers/asahi/agx_blit.c
@@ -459,7 +459,7 @@ agx_blitter_save(struct agx_context *ctx, struct blitter_context *blitter,
                  enum asahi_blitter_op op)
 {
    util_blitter_save_vertex_shader(blitter,
-                                   ctx->stage[PIPE_SHADER_VERTEX].shader);
+                                   ctx->stage[MESA_SHADER_VERTEX].shader);
    util_blitter_save_tessctrl_shader(blitter,
                                      ctx->stage[PIPE_SHADER_TESS_CTRL].shader);
    util_blitter_save_tesseval_shader(blitter,
diff --git a/src/gallium/drivers/asahi/agx_disk_cache.c b/src/gallium/drivers/asahi/agx_disk_cache.c
index f3acee12c6c..3df6933c3b5 100644
--- a/src/gallium/drivers/asahi/agx_disk_cache.c
+++ b/src/gallium/drivers/asahi/agx_disk_cache.c
@@ -34,7 +34,7 @@ agx_disk_cache_compute_key(struct disk_cache *cache,
    uint8_t data[sizeof(uncompiled->nir_sha1) + sizeof(*shader_key)];
    int hash_size = sizeof(uncompiled->nir_sha1);
    int key_size;
-   if (uncompiled->type == PIPE_SHADER_VERTEX ||
+   if (uncompiled->type == MESA_SHADER_VERTEX ||
        uncompiled->type == PIPE_SHADER_TESS_EVAL)
       key_size = sizeof(shader_key->vs);
    else if (uncompiled->type == PIPE_SHADER_FRAGMENT)
@@ -93,7 +93,7 @@ read_shader(struct agx_screen *screen, struct blob_reader *blob,
    blob_copy_bytes(blob, &binary->b.info, sizeof(binary->b.info));
    size_t size = binary->b.info.binary_size;
 
-   if (uncompiled->type == PIPE_SHADER_VERTEX ||
+   if (uncompiled->type == MESA_SHADER_VERTEX ||
        uncompiled->type == PIPE_SHADER_TESS_EVAL ||
        uncompiled->type == PIPE_SHADER_FRAGMENT) {
 
diff --git a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
index ac062ce2acc..39489addd22 100644
--- a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
+++ b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c
@@ -381,7 +381,7 @@ lay_out_uniforms(struct agx_compiled_shader *shader, struct state *state)
 {
    unsigned uniform = 0;
 
-   if (state->stage == PIPE_SHADER_VERTEX ||
+   if (state->stage == MESA_SHADER_VERTEX ||
        state->stage == PIPE_SHADER_TESS_EVAL) {
       unsigned count =
          DIV_ROUND_UP(BITSET_LAST_BIT(shader->attrib_components_read), 4);
diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c
index 9233456ce03..348f1e34a75 100644
--- a/src/gallium/drivers/asahi/agx_pipe.c
+++ b/src/gallium/drivers/asahi/agx_pipe.c
@@ -1873,14 +1873,14 @@ agx_init_shader_caps(struct pipe_screen *pscreen)
 
       caps->max_control_flow_depth = 1024;
 
-      caps->max_inputs = i == PIPE_SHADER_VERTEX ? 16 : 32;
+      caps->max_inputs = i == MESA_SHADER_VERTEX ? 16 : 32;
 
       /* For vertex, the spec min/max is 16. We need more to handle dmat3
        * correctly, though. The full 32 is undesirable since it would require
        * shenanigans to handle.
        */
       caps->max_outputs = i == PIPE_SHADER_FRAGMENT ? 8
-                          : i == PIPE_SHADER_VERTEX ? 24
+                          : i == MESA_SHADER_VERTEX ? 24
                                                     : 32;
 
       caps->max_temps = 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 4401fa9f0ab..4777df5651c 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -431,7 +431,7 @@ agx_bind_rasterizer_state(struct pipe_context *pctx, void *cso)
 static bool
 has_edgeflags(struct agx_context *ctx, enum mesa_prim mode)
 {
-   return ctx->stage[PIPE_SHADER_VERTEX].shader->info.has_edgeflags &&
+   return ctx->stage[MESA_SHADER_VERTEX].shader->info.has_edgeflags &&
           mode == MESA_PRIM_TRIANGLES &&
           (ctx->rast->base.fill_front != PIPE_POLYGON_MODE_FILL);
 }
@@ -1716,7 +1716,7 @@ agx_get_shader_variant(struct agx_screen *screen, struct pipe_context *pctx,
 
    if (so->type == PIPE_SHADER_FRAGMENT) {
       memcpy(cloned_key, key, sizeof(struct asahi_fs_shader_key));
-   } else if (so->type == PIPE_SHADER_VERTEX ||
+   } else if (so->type == MESA_SHADER_VERTEX ||
               so->type == PIPE_SHADER_TESS_EVAL) {
       memcpy(cloned_key, key, sizeof(struct asahi_vs_shader_key));
    } else {
@@ -1952,7 +1952,7 @@ agx_create_shader_state(struct pipe_context *pctx,
        (so->type == PIPE_SHADER_FRAGMENT && !so->info.uses_fbfetch)) {
       union asahi_shader_key key = {0};
       agx_get_shader_variant(agx_screen(pctx->screen), pctx, so, &key);
-   } else if (so->type == PIPE_SHADER_VERTEX) {
+   } else if (so->type == MESA_SHADER_VERTEX) {
       union asahi_shader_key key = {
          .vs.hw = next_stage == MESA_SHADER_FRAGMENT,
       };
@@ -2173,7 +2173,7 @@ agx_update_vs(struct agx_batch *batch, unsigned index_size_B)
               ctx->stage[PIPE_SHADER_GEOMETRY].shader),
    };
 
-   agx_update_shader(ctx, &ctx->vs, PIPE_SHADER_VERTEX,
+   agx_update_shader(ctx, &ctx->vs, MESA_SHADER_VERTEX,
                      (union asahi_shader_key *)&key);
 
    struct agx_device *dev = agx_device(ctx->base.screen);
@@ -2199,7 +2199,7 @@ agx_update_vs(struct agx_batch *batch, unsigned index_size_B)
    void *old = ctx->linked.vs;
 
    ctx->linked.vs =
-      asahi_fast_link(ctx, ctx->stage[PIPE_SHADER_VERTEX].shader, &link_key);
+      asahi_fast_link(ctx, ctx->stage[MESA_SHADER_VERTEX].shader, &link_key);
 
    agx_batch_add_bo(batch, ctx->vs->bo);
    if (ctx->linked.vs)
@@ -2396,7 +2396,7 @@ agx_bind_shader_state(struct pipe_context *pctx, void *cso,
 {
    struct agx_context *ctx = agx_context(pctx);
 
-   if (stage == PIPE_SHADER_VERTEX)
+   if (stage == MESA_SHADER_VERTEX)
       ctx->dirty |= AGX_DIRTY_VS_PROG;
    else if (stage == PIPE_SHADER_FRAGMENT)
       ctx->dirty |= AGX_DIRTY_FS_PROG;
@@ -2409,7 +2409,7 @@ agx_bind_shader_state(struct pipe_context *pctx, void *cso,
 static void
 agx_bind_vs_state(struct pipe_context *pctx, void *cso)
 {
-   agx_bind_shader_state(pctx, cso, PIPE_SHADER_VERTEX);
+   agx_bind_shader_state(pctx, cso, MESA_SHADER_VERTEX);
 }
 
 static void
@@ -2961,7 +2961,7 @@ agx_build_pipeline(struct agx_batch *batch, struct agx_compiled_shader *cs,
          batch->fs_preamble_scratch =
             MAX2(batch->fs_preamble_scratch, preamble_size);
          break;
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          agx_scratch_alloc(&ctx->scratch_vs, max_scratch_size, max_subgroups);
          batch->vs_scratch = true;
          batch->vs_preamble_scratch =
@@ -3494,7 +3494,7 @@ agx_encode_state(struct agx_batch *batch, uint8_t *out)
       agx_push(out, VDM_STATE_VERTEX_SHADER_WORD_1, cfg) {
          cfg.pipeline =
             agx_build_pipeline(batch, vs, ctx->gs ? NULL : ctx->linked.vs,
-                               PIPE_SHADER_VERTEX, 0, 0);
+                               MESA_SHADER_VERTEX, 0, 0);
       }
 
       agx_push_packed(out, vs->uvs.vdm, VDM_STATE_VERTEX_OUTPUTS);
@@ -4309,7 +4309,7 @@ agx_needs_passthrough_gs(struct agx_context *ctx,
     */
    struct agx_uncompiled_shader *last_vtx =
       ctx->stage[PIPE_SHADER_TESS_EVAL].shader
-         ?: ctx->stage[PIPE_SHADER_VERTEX].shader;
+         ?: ctx->stage[MESA_SHADER_VERTEX].shader;
 
    if (last_vtx->has_xfb_info && ctx->streamout.num_targets) {
       *xfb_only = true;
@@ -4385,7 +4385,7 @@ agx_apply_passthrough_gs(struct agx_context *ctx,
 {
    enum pipe_shader_type prev_stage = ctx->stage[PIPE_SHADER_TESS_EVAL].shader
                                          ? PIPE_SHADER_TESS_EVAL
-                                         : PIPE_SHADER_VERTEX;
+                                         : MESA_SHADER_VERTEX;
    struct agx_uncompiled_shader *prev_cso = ctx->stage[prev_stage].shader;
 
    assert(ctx->stage[PIPE_SHADER_GEOMETRY].shader == NULL);
@@ -4688,7 +4688,7 @@ agx_draw_patches(struct agx_context *ctx, const struct pipe_draw_info *info,
    batch->uniforms.tess_params = state;
 
    agx_launch(batch, vs_grid, agx_workgroup(64, 1, 1), ctx->vs, ctx->linked.vs,
-              PIPE_SHADER_VERTEX, 0);
+              MESA_SHADER_VERTEX, 0);
 
    agx_launch(batch, tcs_grid, agx_workgroup(tcs->tess.output_patch_size, 1, 1),
               ctx->tcs, NULL, PIPE_SHADER_TESS_CTRL, 0);
@@ -4720,7 +4720,7 @@ agx_draw_patches(struct agx_context *ctx, const struct pipe_draw_info *info,
    ctx->dirty |= AGX_DIRTY_RS;
 
    /* Run TES as VS */
-   void *vs_cso = ctx->stage[PIPE_SHADER_VERTEX].shader;
+   void *vs_cso = ctx->stage[MESA_SHADER_VERTEX].shader;
    void *tes_cso = ctx->stage[PIPE_SHADER_TESS_EVAL].shader;
    ctx->base.bind_vs_state(&ctx->base, tes_cso);
    ctx->in_tess = true;
@@ -5013,8 +5013,8 @@ agx_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
    /* Update shaders first so we can use them after */
    if (agx_update_vs(batch, info->index_size)) {
       ctx->dirty |= AGX_DIRTY_VS | AGX_DIRTY_VS_PROG;
-      ctx->stage[PIPE_SHADER_VERTEX].dirty = ~0;
-   } else if (ctx->stage[PIPE_SHADER_VERTEX].dirty ||
+      ctx->stage[MESA_SHADER_VERTEX].dirty = ~0;
+   } else if (ctx->stage[MESA_SHADER_VERTEX].dirty ||
               (ctx->dirty & AGX_DIRTY_VERTEX))
       ctx->dirty |= AGX_DIRTY_VS;
 
diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h
index 057d7036e2e..722c4cfe11c 100644
--- a/src/gallium/drivers/asahi/agx_state.h
+++ b/src/gallium/drivers/asahi/agx_state.h
@@ -88,7 +88,7 @@ enum agx_sysval_table {
 
 #define AGX_SYSVAL_STAGE(stage) (AGX_SYSVAL_TABLE_VS + (stage))
 
-static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_VERTEX) == AGX_SYSVAL_TABLE_VS,
+static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_VERTEX) == AGX_SYSVAL_TABLE_VS,
               "fixed enum orderings");
 static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_TESS_CTRL) == AGX_SYSVAL_TABLE_TCS,
               "fixed enum orderings");
diff --git a/src/gallium/drivers/crocus/crocus_screen.c b/src/gallium/drivers/crocus/crocus_screen.c
index b7548cf39f3..545040fddde 100644
--- a/src/gallium/drivers/crocus/crocus_screen.c
+++ b/src/gallium/drivers/crocus/crocus_screen.c
@@ -144,12 +144,12 @@ crocus_init_shader_caps(struct crocus_screen *screen)
          (struct pipe_shader_caps *)&screen->base.shader_caps[i];
 
       if (devinfo->ver < 6 &&
-          i != PIPE_SHADER_VERTEX &&
+          i != MESA_SHADER_VERTEX &&
           i != PIPE_SHADER_FRAGMENT)
          continue;
 
       if (devinfo->ver == 6 &&
-          i != PIPE_SHADER_VERTEX &&
+          i != MESA_SHADER_VERTEX &&
           i != PIPE_SHADER_FRAGMENT &&
           i != PIPE_SHADER_GEOMETRY)
          continue;
diff --git a/src/gallium/drivers/crocus/crocus_state.c b/src/gallium/drivers/crocus/crocus_state.c
index b48f8a12613..583ab5eb4f9 100644
--- a/src/gallium/drivers/crocus/crocus_state.c
+++ b/src/gallium/drivers/crocus/crocus_state.c
@@ -2320,7 +2320,7 @@ crocus_bind_sampler_states(struct pipe_context *ctx,
 #if GFX_VER <= 5
       if (p_stage == PIPE_SHADER_FRAGMENT)
          ice->state.dirty |= CROCUS_DIRTY_WM;
-      else if (p_stage == PIPE_SHADER_VERTEX)
+      else if (p_stage == MESA_SHADER_VERTEX)
          ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_VS;
 #endif
       ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_SAMPLER_STATES_VS << stage;
diff --git a/src/gallium/drivers/d3d12/d3d12_blit.cpp b/src/gallium/drivers/d3d12/d3d12_blit.cpp
index fd4f5c81c85..65528403b6e 100644
--- a/src/gallium/drivers/d3d12/d3d12_blit.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_blit.cpp
@@ -271,7 +271,7 @@ util_blit_save_state(struct d3d12_context *ctx)
    util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
    util_blitter_save_rasterizer(ctx->blitter, ctx->gfx_pipeline_state.rast);
    util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
-   util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_VERTEX]);
+   util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
    util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
    util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_CTRL]);
    util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
diff --git a/src/gallium/drivers/d3d12/d3d12_compiler.cpp b/src/gallium/drivers/d3d12/d3d12_compiler.cpp
index ba6e5284920..973bd8e8060 100644
--- a/src/gallium/drivers/d3d12/d3d12_compiler.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_compiler.cpp
@@ -104,7 +104,7 @@ compile_nir(struct d3d12_context *ctx, struct d3d12_shader_selector *sel,
                  key->n_texture_states, key->tex_wrap_states, key->swizzle_state,
                  screen->base.caps.max_texture_lod_bias);
 
-   if (key->stage == PIPE_SHADER_VERTEX && key->vs.needs_format_emulation)
+   if (key->stage == MESA_SHADER_VERTEX && key->vs.needs_format_emulation)
       dxil_nir_lower_vs_vertex_conversion(nir, key->vs.format_conversion);
 
    if (key->last_vertex_processing_stage) {
@@ -325,7 +325,7 @@ needs_edge_flag_fix(enum mesa_prim mode)
 static unsigned
 fill_mode_lowered(struct d3d12_context *ctx, const struct pipe_draw_info *dinfo)
 {
-   struct d3d12_shader_selector *vs = ctx->gfx_stages[PIPE_SHADER_VERTEX];
+   struct d3d12_shader_selector *vs = ctx->gfx_stages[MESA_SHADER_VERTEX];
 
    if ((ctx->gfx_stages[PIPE_SHADER_GEOMETRY] != NULL &&
         !ctx->gfx_stages[PIPE_SHADER_GEOMETRY]->is_variant) ||
@@ -365,7 +365,7 @@ has_stream_out_for_streams(struct d3d12_context *ctx)
 static bool
 needs_point_sprite_lowering(struct d3d12_context *ctx, const struct pipe_draw_info *dinfo)
 {
-   struct d3d12_shader_selector *vs = ctx->gfx_stages[PIPE_SHADER_VERTEX];
+   struct d3d12_shader_selector *vs = ctx->gfx_stages[MESA_SHADER_VERTEX];
    struct d3d12_shader_selector *gs = ctx->gfx_stages[PIPE_SHADER_GEOMETRY];
 
    if (gs != NULL && !gs->is_variant) {
@@ -407,7 +407,7 @@ get_provoking_vertex(struct d3d12_selection_context *sel_ctx, bool *alternate, c
       return 0;
    }
 
-   struct d3d12_shader_selector *vs = sel_ctx->ctx->gfx_stages[PIPE_SHADER_VERTEX];
+   struct d3d12_shader_selector *vs = sel_ctx->ctx->gfx_stages[MESA_SHADER_VERTEX];
    struct d3d12_shader_selector *gs = sel_ctx->ctx->gfx_stages[PIPE_SHADER_GEOMETRY];
    struct d3d12_shader_selector *last_vertex_stage = gs && !gs->is_variant ? gs : vs;
 
@@ -416,7 +416,7 @@ get_provoking_vertex(struct d3d12_selection_context *sel_ctx, bool *alternate, c
    case PIPE_SHADER_GEOMETRY:
       mode = (enum mesa_prim)last_vertex_stage->initial->info.gs.output_primitive;
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       mode = (enum mesa_prim)dinfo->mode;
       break;
    default:
@@ -630,7 +630,7 @@ validate_geometry_shader_variant(struct d3d12_selection_context *sel_ctx)
    if (gs != NULL && !gs->is_variant)
       return;
 
-   d3d12_shader_selector* vs = ctx->gfx_stages[PIPE_SHADER_VERTEX];
+   d3d12_shader_selector* vs = ctx->gfx_stages[MESA_SHADER_VERTEX];
    d3d12_shader_selector* fs = ctx->gfx_stages[PIPE_SHADER_FRAGMENT];
 
    struct d3d12_gs_variant_key key;
@@ -707,7 +707,7 @@ d3d12_compare_shader_keys(struct d3d12_selection_context* sel_ctx, const d3d12_s
       return false;
 
    switch (expect->stage) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       if (expect->vs.needs_format_emulation != have->vs.needs_format_emulation)
          return false;
 
@@ -800,7 +800,7 @@ d3d12_shader_key_hash(const d3d12_shader_key *key)
    if (key->prev_has_frac_outputs)
       hash = _mesa_hash_data_with_seed(key->prev_varying_frac_outputs, sizeof(d3d12_shader_selector::varying_frac_outputs), hash);
    switch (key->stage) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       /* (Probably) not worth the bit extraction for needs_format_emulation and
        * the rest of the the format_conversion data is large.  Don't bother
        * hashing for now until this is shown to be worthwhile. */
@@ -843,7 +843,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
 
    switch (stage)
    {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       key->vs.needs_format_emulation = 0;
       break; 
    case PIPE_SHADER_FRAGMENT:
@@ -903,7 +903,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
    }
 
    if (stage == PIPE_SHADER_GEOMETRY ||
-       ((stage == PIPE_SHADER_VERTEX || stage == PIPE_SHADER_TESS_EVAL) &&
+       ((stage == MESA_SHADER_VERTEX || stage == PIPE_SHADER_TESS_EVAL) &&
           (!next || next->stage == PIPE_SHADER_FRAGMENT))) {
       key->last_vertex_processing_stage = 1;
       key->invert_depth = sel_ctx->ctx->reverse_depth_range;
@@ -1015,7 +1015,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
          memset(key->tex_wrap_states, 0, sizeof(key->tex_wrap_states[0]) * key->n_texture_states);
    }
 
-   if (stage == PIPE_SHADER_VERTEX && sel_ctx->ctx->gfx_pipeline_state.ves) {
+   if (stage == MESA_SHADER_VERTEX && sel_ctx->ctx->gfx_pipeline_state.ves) {
       key->vs.needs_format_emulation = sel_ctx->ctx->gfx_pipeline_state.ves->needs_format_emulation;
       if (key->vs.needs_format_emulation) {
          unsigned num_elements = sel_ctx->ctx->gfx_pipeline_state.ves->num_elements;
@@ -1200,7 +1200,7 @@ static d3d12_shader_selector *
 get_prev_shader(struct d3d12_context *ctx, pipe_shader_type current)
 {
    switch (current) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return NULL;
    case PIPE_SHADER_FRAGMENT:
       if (ctx->gfx_stages[PIPE_SHADER_GEOMETRY])
@@ -1215,7 +1215,7 @@ get_prev_shader(struct d3d12_context *ctx, pipe_shader_type current)
          return ctx->gfx_stages[PIPE_SHADER_TESS_CTRL];
       FALLTHROUGH;
    case PIPE_SHADER_TESS_CTRL:
-      return ctx->gfx_stages[PIPE_SHADER_VERTEX];
+      return ctx->gfx_stages[MESA_SHADER_VERTEX];
    default:
       UNREACHABLE("shader type not supported");
    }
@@ -1225,7 +1225,7 @@ static d3d12_shader_selector *
 get_next_shader(struct d3d12_context *ctx, pipe_shader_type current)
 {
    switch (current) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       if (ctx->gfx_stages[PIPE_SHADER_TESS_CTRL])
          return ctx->gfx_stages[PIPE_SHADER_TESS_CTRL];
       FALLTHROUGH;
@@ -1509,9 +1509,9 @@ d3d12_select_shader_variants(struct d3d12_context *ctx, const struct pipe_draw_i
    auto* stages = ctx->gfx_stages;
    d3d12_shader_selector* prev;
    d3d12_shader_selector* next;
-   if (stages[PIPE_SHADER_VERTEX]) {
-      next = get_next_shader(ctx, PIPE_SHADER_VERTEX);
-      select_shader_variant(&sel_ctx, stages[PIPE_SHADER_VERTEX], nullptr, next);
+   if (stages[MESA_SHADER_VERTEX]) {
+      next = get_next_shader(ctx, MESA_SHADER_VERTEX);
+      select_shader_variant(&sel_ctx, stages[MESA_SHADER_VERTEX], nullptr, next);
    }
    if (stages[PIPE_SHADER_TESS_CTRL]) {
       prev = get_prev_shader(ctx, PIPE_SHADER_TESS_CTRL);
diff --git a/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp b/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
index 388ba0379e3..2f73af48d38 100644
--- a/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
@@ -1074,14 +1074,14 @@ static void *
 d3d12_create_vs_state(struct pipe_context *pctx,
                       const struct pipe_shader_state *shader)
 {
-   return d3d12_create_shader(d3d12_context(pctx), PIPE_SHADER_VERTEX, shader);
+   return d3d12_create_shader(d3d12_context(pctx), MESA_SHADER_VERTEX, shader);
 }
 
 static void
 d3d12_bind_vs_state(struct pipe_context *pctx,
                     void *vss)
 {
-   bind_stage(d3d12_context(pctx), PIPE_SHADER_VERTEX,
+   bind_stage(d3d12_context(pctx), MESA_SHADER_VERTEX,
               (struct d3d12_shader_selector *) vss);
 }
 
@@ -1089,7 +1089,7 @@ static void
 d3d12_delete_vs_state(struct pipe_context *pctx,
                       void *vs)
 {
-   delete_shader(d3d12_context(pctx), PIPE_SHADER_VERTEX,
+   delete_shader(d3d12_context(pctx), MESA_SHADER_VERTEX,
                  (struct d3d12_shader_selector *) vs);
 }
 
@@ -1951,7 +1951,7 @@ d3d12_clear_render_target(struct pipe_context *pctx,
       util_blitter_save_stencil_ref(ctx->blitter, &ctx->stencil_ref);
       util_blitter_save_rasterizer(ctx->blitter, ctx->gfx_pipeline_state.rast);
       util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
-      util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_VERTEX]);
+      util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
       util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
       util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_CTRL]);
       util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
diff --git a/src/gallium/drivers/d3d12/d3d12_draw.cpp b/src/gallium/drivers/d3d12/d3d12_draw.cpp
index ccde4cb2861..61487e010c1 100644
--- a/src/gallium/drivers/d3d12/d3d12_draw.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_draw.cpp
@@ -747,7 +747,7 @@ d3d12_last_vertex_stage(struct d3d12_context *ctx)
    if (!sel || sel->is_variant)
       sel = ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
    if (!sel)
-      sel = ctx->gfx_stages[PIPE_SHADER_VERTEX];
+      sel = ctx->gfx_stages[MESA_SHADER_VERTEX];
    return sel;
 }
 
@@ -759,10 +759,10 @@ update_draw_indirect_with_sysvals(struct d3d12_context *ctx,
    struct pipe_draw_indirect_info *indirect_out)
 {
    if (*indirect_inout == nullptr ||
-      ctx->gfx_stages[PIPE_SHADER_VERTEX] == nullptr)
+      ctx->gfx_stages[MESA_SHADER_VERTEX] == nullptr)
       return false;
 
-   auto sys_values_read = ctx->gfx_stages[PIPE_SHADER_VERTEX]->initial->info.system_values_read;
+   auto sys_values_read = ctx->gfx_stages[MESA_SHADER_VERTEX]->initial->info.system_values_read;
    bool any =  BITSET_TEST(sys_values_read, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) ||
                BITSET_TEST(sys_values_read, SYSTEM_VALUE_BASE_VERTEX) ||
                BITSET_TEST(sys_values_read, SYSTEM_VALUE_FIRST_VERTEX) ||
@@ -839,7 +839,7 @@ update_draw_auto(struct d3d12_context *ctx,
 {
    if (*indirect_inout == nullptr ||
        (*indirect_inout)->count_from_stream_output == nullptr ||
-       ctx->gfx_stages[PIPE_SHADER_VERTEX] == nullptr)
+       ctx->gfx_stages[MESA_SHADER_VERTEX] == nullptr)
       return false;
 
    d3d12_compute_transform_save_restore save;
diff --git a/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp b/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
index be2c5aa0a11..c3468837eba 100644
--- a/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
@@ -283,8 +283,8 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
 
    nir_shader *last_vertex_stage_nir = NULL;
 
-   if (state->stages[PIPE_SHADER_VERTEX]) {
-      auto shader = state->stages[PIPE_SHADER_VERTEX];
+   if (state->stages[MESA_SHADER_VERTEX]) {
+      auto shader = state->stages[MESA_SHADER_VERTEX];
       pso_desc.VS = D3D12_SHADER_BYTECODE { shader->bytecode, shader->bytecode_length };
       last_vertex_stage_nir = shader->nir;
    }
@@ -347,7 +347,7 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
    D3D12_INPUT_LAYOUT_DESC& input_layout = (D3D12_INPUT_LAYOUT_DESC&)pso_desc.InputLayout;
    input_layout.pInputElementDescs = state->ves->elements;
    input_layout.NumElements = state->ves->num_elements;
-   copy_input_attribs(state->ves->elements, input_attribs, &input_layout, state->stages[PIPE_SHADER_VERTEX]->nir);
+   copy_input_attribs(state->ves->elements, input_attribs, &input_layout, state->stages[MESA_SHADER_VERTEX]->nir);
 
    pso_desc.IBStripCutValue = state->ib_strip_cut_value;
 
diff --git a/src/gallium/drivers/d3d12/d3d12_root_signature.cpp b/src/gallium/drivers/d3d12/d3d12_root_signature.cpp
index f0feab8f8a7..b81c30224a0 100644
--- a/src/gallium/drivers/d3d12/d3d12_root_signature.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_root_signature.cpp
@@ -41,7 +41,7 @@ static D3D12_SHADER_VISIBILITY
 get_shader_visibility(enum pipe_shader_type stage)
 {
    switch (stage) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return D3D12_SHADER_VISIBILITY_VERTEX;
    case PIPE_SHADER_FRAGMENT:
       return D3D12_SHADER_VISIBILITY_PIXEL;
diff --git a/src/gallium/drivers/d3d12/d3d12_screen.cpp b/src/gallium/drivers/d3d12/d3d12_screen.cpp
index c98b44535b2..18c6ddcc08a 100644
--- a/src/gallium/drivers/d3d12/d3d12_screen.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_screen.cpp
@@ -138,7 +138,7 @@ d3d12_init_shader_caps(struct d3d12_screen *screen)
       caps->max_control_flow_depth = INT_MAX;
 
       switch (i) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          caps->max_inputs = D3D12_VS_INPUT_REGISTER_COUNT;
          caps->max_outputs = D3D12_VS_OUTPUT_REGISTER_COUNT;
          break;
diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c b/src/gallium/drivers/etnaviv/etnaviv_context.c
index 2272522e506..0ab0f5734b4 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
@@ -343,8 +343,8 @@ etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
 
    if (ctx->dirty & ETNA_DIRTY_SHADER) {
       /* Mark constant buffers as being read */
-      u_foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask)
-         resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb[i].buffer);
+      u_foreach_bit(i, ctx->constant_buffer[MESA_SHADER_VERTEX].enabled_mask)
+         resource_read(ctx, ctx->constant_buffer[MESA_SHADER_VERTEX].cb[i].buffer);
 
       u_foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask)
          resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb[i].buffer);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index 1dce3040b42..1c43b365662 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -744,7 +744,7 @@ etna_emit_state(struct etna_context *ctx)
       if (need_steering)
          etna_set_state(stream, VIVS_SH_CONTROL, 0x0);
 
-      etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb);
+      etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[MESA_SHADER_VERTEX].cb);
 
       if (need_steering)
          etna_set_state(stream, VIVS_SH_CONTROL, VIVS_SH_CONTROL_PS_UNIFORM);
@@ -763,7 +763,7 @@ etna_emit_state(struct etna_context *ctx)
          etna_set_state(stream, VIVS_SH_CONTROL, 0x0);
 
       if (dirty & (uniform_dirty_bits | ctx->shader.vs->uniforms_dirty_bits))
-         etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb);
+         etna_uniforms_write(ctx, ctx->shader.vs, ctx->constant_buffer[MESA_SHADER_VERTEX].cb);
 
       /* ideally this cache would only be flushed if there are PS uniform changes */
       if (need_steering)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index b23c01e1f0c..5da4ab6dd69 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -201,7 +201,7 @@ etna_init_single_shader_caps(struct etna_screen *screen, enum pipe_shader_type s
 static void
 etna_init_shader_caps(struct etna_screen *screen)
 {
-   etna_init_single_shader_caps(screen, PIPE_SHADER_VERTEX);
+   etna_init_single_shader_caps(screen, MESA_SHADER_VERTEX);
    etna_init_single_shader_caps(screen, PIPE_SHADER_FRAGMENT);
 }
 
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture.c b/src/gallium/drivers/etnaviv/etnaviv_texture.c
index 3f98d180227..9b02ee9462c 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture.c
@@ -54,7 +54,7 @@ etna_bind_sampler_states(struct pipe_context *pctx, enum pipe_shader_type shader
       offset = 0;
       ctx->num_fragment_samplers = num_samplers;
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       offset = screen->specs.vertex_sampler_offset;
       break;
    default:
@@ -334,7 +334,7 @@ etna_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
    case PIPE_SHADER_FRAGMENT:
       etna_fragtex_set_sampler_views(ctx, num_views, views);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       etna_vertex_set_sampler_views(ctx, num_views, views);
       break;
    default:;
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_draw.c b/src/gallium/drivers/freedreno/a2xx/fd2_draw.c
index c33b1c88cbc..decbaadd957 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_draw.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_draw.c
@@ -637,7 +637,7 @@ dirty:
                  FD_DIRTY_SAMPLE_MASK | FD_DIRTY_PROG | FD_DIRTY_CONST |
                  FD_DIRTY_BLEND | FD_DIRTY_FRAMEBUFFER | FD_DIRTY_SCISSOR;
 
-   ctx->dirty_shader[PIPE_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG;
+   ctx->dirty_shader[MESA_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG;
    ctx->dirty_shader[PIPE_SHADER_FRAGMENT] |=
       FD_DIRTY_SHADER_PROG | FD_DIRTY_SHADER_CONST;
 
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
index f38af6a5d1e..ef8344aedc8 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c
@@ -138,7 +138,7 @@ static void
 emit_textures(struct fd_ringbuffer *ring, struct fd_context *ctx)
 {
    struct fd_texture_stateobj *fragtex = &ctx->tex[PIPE_SHADER_FRAGMENT];
-   struct fd_texture_stateobj *verttex = &ctx->tex[PIPE_SHADER_VERTEX];
+   struct fd_texture_stateobj *verttex = &ctx->tex[MESA_SHADER_VERTEX];
    texmask emitted = 0;
    unsigned i;
 
@@ -180,7 +180,7 @@ fd2_emit_state_binning(struct fd_context *ctx,
 
    if (dirty & (FD_DIRTY_PROG | FD_DIRTY_CONST)) {
       emit_constants(ring, VS_CONST_BASE * 4,
-                     &ctx->constbuf[PIPE_SHADER_VERTEX],
+                     &ctx->constbuf[MESA_SHADER_VERTEX],
                      (dirty & FD_DIRTY_PROG) ? ctx->prog.vs : NULL);
    }
 
@@ -348,7 +348,7 @@ fd2_emit_state(struct fd_context *ctx, const enum fd_dirty_3d_state dirty)
 
    if (dirty & (FD_DIRTY_PROG | FD_DIRTY_CONST)) {
       emit_constants(ring, VS_CONST_BASE * 4,
-                     &ctx->constbuf[PIPE_SHADER_VERTEX],
+                     &ctx->constbuf[MESA_SHADER_VERTEX],
                      (dirty & FD_DIRTY_PROG) ? ctx->prog.vs : NULL);
       emit_constants(ring, PS_CONST_BASE * 4,
                      &ctx->constbuf[PIPE_SHADER_FRAGMENT],
diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_program.c b/src/gallium/drivers/freedreno/a2xx/fd2_program.c
index 9a2baca2e7f..9a0048d80d2 100644
--- a/src/gallium/drivers/freedreno/a2xx/fd2_program.c
+++ b/src/gallium/drivers/freedreno/a2xx/fd2_program.c
@@ -175,7 +175,7 @@ fd2_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
    /* clear/gmem2mem/mem2gmem need to be changed to remove this condition */
    if (prog != &ctx->solid_prog && prog != &ctx->blit_prog[0]) {
-      patch_fetches(ctx, vpi, ctx->vtx.vtx, &ctx->tex[PIPE_SHADER_VERTEX]);
+      patch_fetches(ctx, vpi, ctx->vtx.vtx, &ctx->tex[MESA_SHADER_VERTEX]);
       if (fp)
          patch_fetches(ctx, fpi, NULL, &ctx->tex[PIPE_SHADER_FRAGMENT]);
    }
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index 15eb0e78b34..c581ba4b007 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -42,7 +42,7 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
    fd3_emit_state(ctx, ring, emit);
 
-   if ((ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_PROG) ||
+   if ((ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_PROG) ||
        (emit->dirty & (FD_DIRTY_VTXBUF | FD_DIRTY_VTXSTATE)))
       fd3_emit_vertex_bufs(ring, emit);
 
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 51389c36e80..80ec5d1a840 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -810,8 +810,8 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
    if (dirty & FD_DIRTY_TEX)
       fd_wfi(ctx->batch, ring);
 
-   if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX)
-      emit_textures(ctx, ring, SB_VERT_TEX, &ctx->tex[PIPE_SHADER_VERTEX]);
+   if (ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX)
+      emit_textures(ctx, ring, SB_VERT_TEX, &ctx->tex[MESA_SHADER_VERTEX]);
 
    if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX)
       emit_textures(ctx, ring, SB_FRAG_TEX, &ctx->tex[PIPE_SHADER_FRAGMENT]);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
index af93832e207..abf91a86cf1 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_draw.c
@@ -30,7 +30,7 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
    fd4_emit_state(ctx, ring, emit);
 
-   if ((ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_PROG) ||
+   if ((ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_PROG) ||
        (emit->dirty & (FD_DIRTY_VTXBUF | FD_DIRTY_VTXSTATE)))
       fd4_emit_vertex_bufs(ring, emit);
 
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index d22fd21b614..3c17ef6b4c5 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -894,8 +894,8 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
       OUT_RING(ring, A4XX_RB_BLEND_ALPHA_F32(bcolor->color[3]));
    }
 
-   if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX)
-      emit_textures(ctx, ring, SB4_VS_TEX, &ctx->tex[PIPE_SHADER_VERTEX], vp);
+   if (ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX)
+      emit_textures(ctx, ring, SB4_VS_TEX, &ctx->tex[MESA_SHADER_VERTEX], vp);
 
    if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX)
       emit_textures(ctx, ring, SB4_FS_TEX, &ctx->tex[PIPE_SHADER_FRAGMENT], fp);
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
index 66b3849d305..60a42ce409a 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_texture.c
@@ -226,7 +226,7 @@ fd4_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
 
    if (shader == PIPE_SHADER_FRAGMENT) {
       sampler_swizzles = fd4_ctx->fsampler_swizzles;
-   } else if (shader == PIPE_SHADER_VERTEX) {
+   } else if (shader == MESA_SHADER_VERTEX) {
       sampler_swizzles = fd4_ctx->vsampler_swizzles;
    } else if (shader == PIPE_SHADER_COMPUTE) {
       sampler_swizzles = fd4_ctx->csampler_swizzles;
@@ -276,7 +276,7 @@ fd4_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
 
    if (shader == PIPE_SHADER_FRAGMENT) {
       fd4_ctx->fastc_srgb = astc_srgb;
-   } else if (shader == PIPE_SHADER_VERTEX) {
+   } else if (shader == MESA_SHADER_VERTEX) {
       fd4_ctx->vastc_srgb = astc_srgb;
    } else if (shader == PIPE_SHADER_COMPUTE) {
       fd4_ctx->castc_srgb = astc_srgb;
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
index 8bb0f1c9fbd..f0dff4ee3c9 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
@@ -30,7 +30,7 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
    fd5_emit_state(ctx, ring, emit);
 
-   if ((ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_PROG) ||
+   if ((ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_PROG) ||
        (emit->dirty & (FD_DIRTY_VTXBUF | FD_DIRTY_VTXSTATE)))
       fd5_emit_vertex_bufs(ring, emit);
 
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index dfb63348af7..e53ba36c4d6 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -300,9 +300,9 @@ emit_border_color(struct fd_context *ctx, struct fd_ringbuffer *ring) assert_dt
 
    entries = ptr;
 
-   setup_border_colors(&ctx->tex[PIPE_SHADER_VERTEX], &entries[0]);
+   setup_border_colors(&ctx->tex[MESA_SHADER_VERTEX], &entries[0]);
    setup_border_colors(&ctx->tex[PIPE_SHADER_FRAGMENT],
-                       &entries[ctx->tex[PIPE_SHADER_VERTEX].num_samplers]);
+                       &entries[ctx->tex[MESA_SHADER_VERTEX].num_samplers]);
 
    OUT_PKT4(ring, REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO, 2);
    OUT_RELOC(ring, fd_resource(fd5_ctx->border_color_buf)->bo, off, 0, 0);
@@ -317,7 +317,7 @@ emit_textures(struct fd_context *ctx, struct fd_ringbuffer *ring,
 {
    bool needs_border = false;
    unsigned bcolor_offset =
-      (sb == SB4_FS_TEX) ? ctx->tex[PIPE_SHADER_VERTEX].num_samplers : 0;
+      (sb == SB4_FS_TEX) ? ctx->tex[MESA_SHADER_VERTEX].num_samplers : 0;
    unsigned i;
 
    if (tex->num_samplers > 0) {
@@ -822,11 +822,11 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
       OUT_RING(ring, A5XX_RB_BLEND_ALPHA_F32(bcolor->color[3]));
    }
 
-   if (ctx->dirty_shader[PIPE_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX) {
+   if (ctx->dirty_shader[MESA_SHADER_VERTEX] & FD_DIRTY_SHADER_TEX) {
       needs_border |=
-         emit_textures(ctx, ring, SB4_VS_TEX, &ctx->tex[PIPE_SHADER_VERTEX]);
+         emit_textures(ctx, ring, SB4_VS_TEX, &ctx->tex[MESA_SHADER_VERTEX]);
       OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 1);
-      OUT_RING(ring, ctx->tex[PIPE_SHADER_VERTEX].num_textures);
+      OUT_RING(ring, ctx->tex[MESA_SHADER_VERTEX].num_textures);
    }
 
    if (ctx->dirty_shader[PIPE_SHADER_FRAGMENT] & FD_DIRTY_SHADER_TEX) {
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_const.cc b/src/gallium/drivers/freedreno/a6xx/fd6_const.cc
index c05a4aa2196..ee268ab6411 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_const.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_const.cc
@@ -347,7 +347,7 @@ fd6_build_user_consts(struct fd6_emit *emit)
    struct fd_ringbuffer *constobj =
       fd_submit_new_ringbuffer(ctx->batch->submit, sz, FD_RINGBUFFER_STREAMING);
 
-   emit_user_consts<CHIP>(emit->vs, constobj, &ctx->constbuf[PIPE_SHADER_VERTEX]);
+   emit_user_consts<CHIP>(emit->vs, constobj, &ctx->constbuf[MESA_SHADER_VERTEX]);
 
    if (PIPELINE == HAS_TESS_GS) {
       if (emit->hs) {
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.cc b/src/gallium/drivers/freedreno/a6xx/fd6_context.cc
index bd6446b43ef..70c66b3e696 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.cc
@@ -177,7 +177,7 @@ setup_state_map(struct fd_context *ctx)
    fd_context_add_map(ctx, FD_DIRTY_BLEND_COHERENT,
       BIT(FD6_GROUP_PRIM_MODE_SYSMEM) | BIT(FD6_GROUP_PRIM_MODE_GMEM));
 
-   fd_context_add_shader_map(ctx, PIPE_SHADER_VERTEX, FD_DIRTY_SHADER_TEX,
+   fd_context_add_shader_map(ctx, MESA_SHADER_VERTEX, FD_DIRTY_SHADER_TEX,
                              BIT(FD6_GROUP_VS_TEX));
    fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_CTRL, FD_DIRTY_SHADER_TEX,
                              BIT(FD6_GROUP_HS_TEX));
@@ -190,7 +190,7 @@ setup_state_map(struct fd_context *ctx)
    fd_context_add_shader_map(ctx, PIPE_SHADER_COMPUTE, FD_DIRTY_SHADER_TEX,
                              BIT(FD6_GROUP_CS_TEX));
 
-   fd_context_add_shader_map(ctx, PIPE_SHADER_VERTEX,
+   fd_context_add_shader_map(ctx, MESA_SHADER_VERTEX,
                              FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
                              BIT(FD6_GROUP_VS_BINDLESS));
    fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_CTRL,
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
index b29606eafa6..255dc799e9a 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
@@ -659,7 +659,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
          fd6_state_take_group(&emit->state, state, FD6_GROUP_SAMPLE_LOCATIONS);
          break;
       case FD6_GROUP_VS_BINDLESS:
-         state = fd6_build_bindless_state<CHIP>(ctx, PIPE_SHADER_VERTEX, false);
+         state = fd6_build_bindless_state<CHIP>(ctx, MESA_SHADER_VERTEX, false);
          fd6_state_take_group(&emit->state, state, FD6_GROUP_VS_BINDLESS);
          break;
       case FD6_GROUP_HS_BINDLESS:
@@ -693,7 +693,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
          }
          break;
       case FD6_GROUP_VS_TEX:
-         state = tex_state(ctx, PIPE_SHADER_VERTEX);
+         state = tex_state(ctx, MESA_SHADER_VERTEX);
          fd6_state_take_group(&emit->state, state, FD6_GROUP_VS_TEX);
          break;
       case FD6_GROUP_HS_TEX:
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc b/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
index 85908824ade..8f26669ed6d 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
@@ -610,7 +610,7 @@ build_texture_state(struct fd_context *ctx, enum pipe_shader_type type,
    enum a6xx_state_block sb;
 
    switch (type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       sb = SB6_VS_TEX;
       opcode = CP_LOAD_STATE6_GEOM;
       tex_samp_reg = REG_A6XX_SP_VS_SAMPLER_BASE;
diff --git a/src/gallium/drivers/freedreno/freedreno_program.c b/src/gallium/drivers/freedreno/freedreno_program.c
index d95b7c0569a..21c8b98310c 100644
--- a/src/gallium/drivers/freedreno/freedreno_program.c
+++ b/src/gallium/drivers/freedreno/freedreno_program.c
@@ -72,8 +72,8 @@ fd_vs_state_bind(struct pipe_context *pctx, void *hwcso) in_dt
 {
    struct fd_context *ctx = fd_context(pctx);
    ctx->prog.vs = hwcso;
-   fd_context_dirty_shader(ctx, PIPE_SHADER_VERTEX, FD_DIRTY_SHADER_PROG);
-   update_bound_stage(ctx, PIPE_SHADER_VERTEX, !!hwcso);
+   fd_context_dirty_shader(ctx, MESA_SHADER_VERTEX, FD_DIRTY_SHADER_PROG);
+   update_bound_stage(ctx, MESA_SHADER_VERTEX, !!hwcso);
 }
 
 static void
@@ -160,7 +160,7 @@ fd_prog_blit_vs(struct pipe_context *pctx)
 {
    struct ureg_program *ureg;
 
-   ureg = ureg_create(PIPE_SHADER_VERTEX);
+   ureg = ureg_create(MESA_SHADER_VERTEX);
    if (!ureg)
       return NULL;
 
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 94bf56c82df..2b7f6dd39a5 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -271,7 +271,7 @@ fd_init_shader_caps(struct fd_screen *screen)
       caps->supported_irs =
          (1 << PIPE_SHADER_IR_NIR) |
          /* tgsi_to_nir doesn't support all stages: */
-         COND(i == PIPE_SHADER_VERTEX ||
+         COND(i == MESA_SHADER_VERTEX ||
               i == PIPE_SHADER_FRAGMENT ||
               i == PIPE_SHADER_COMPUTE,
               1 << PIPE_SHADER_IR_TGSI);
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_const.h b/src/gallium/drivers/freedreno/ir3/ir3_const.h
index 92cdeda25d9..45f9dd7b816 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_const.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_const.h
@@ -568,7 +568,7 @@ ir3_emit_vs_consts(const struct ir3_shader_variant *v,
 {
    assert(v->type == MESA_SHADER_VERTEX);
 
-   emit_common_consts(v, ring, ctx, PIPE_SHADER_VERTEX);
+   emit_common_consts(v, ring, ctx, MESA_SHADER_VERTEX);
 
    /* emit driver params every time: */
    if (info && v->need_driver_params) {
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h b/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
index 1186d154edb..275aa3bc9e9 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
@@ -35,7 +35,7 @@ static inline unsigned
 ir3_shader_descriptor_set(enum pipe_shader_type shader)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX: return 0;
+   case MESA_SHADER_VERTEX: return 0;
    case PIPE_SHADER_TESS_CTRL: return 1;
    case PIPE_SHADER_TESS_EVAL: return 2;
    case PIPE_SHADER_GEOMETRY:  return 3;
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
index ccec262e886..94b6a47d4bb 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
@@ -469,7 +469,7 @@ ir3_fixup_shader_state(struct pipe_context *pctx, struct ir3_shader_key *key)
       }
 
       if (ir3_shader_key_changes_vs(ctx->last.key, key)) {
-         fd_context_dirty_shader(ctx, PIPE_SHADER_VERTEX, FD_DIRTY_SHADER_PROG);
+         fd_context_dirty_shader(ctx, MESA_SHADER_VERTEX, FD_DIRTY_SHADER_PROG);
       }
 
       /* NOTE: currently only a6xx has gs/tess, but needs no
diff --git a/src/gallium/drivers/i915/i915_context.c b/src/gallium/drivers/i915/i915_context.c
index 1a6b3656893..0a5483f4f6b 100644
--- a/src/gallium/drivers/i915/i915_context.c
+++ b/src/gallium/drivers/i915/i915_context.c
@@ -100,14 +100,14 @@ i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
       draw_set_indexes(draw, (uint8_t *)mapped_indices, info->index_size, ~0);
    }
 
-   if (i915->constants[PIPE_SHADER_VERTEX])
+   if (i915->constants[MESA_SHADER_VERTEX])
       draw_set_mapped_constant_buffer(
-         draw, PIPE_SHADER_VERTEX, 0,
-         i915_buffer(i915->constants[PIPE_SHADER_VERTEX])->data,
-         (i915->current.num_user_constants[PIPE_SHADER_VERTEX] * 4 *
+         draw, MESA_SHADER_VERTEX, 0,
+         i915_buffer(i915->constants[MESA_SHADER_VERTEX])->data,
+         (i915->current.num_user_constants[MESA_SHADER_VERTEX] * 4 *
           sizeof(float)));
    else
-      draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0, NULL, 0);
+      draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 0, NULL, 0);
 
    /*
     * Do the drawing
diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c
index 05aab8c98fd..6cb1fc691ef 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -254,7 +254,7 @@ static void
 i915_init_shader_caps(struct i915_screen *is)
 {
    struct pipe_shader_caps *caps =
-      (struct pipe_shader_caps *)&is->base.shader_caps[PIPE_SHADER_VERTEX];
+      (struct pipe_shader_caps *)&is->base.shader_caps[MESA_SHADER_VERTEX];
 
    draw_init_shader_caps(caps);
 
@@ -557,7 +557,7 @@ i915_screen_create(struct i915_winsys *iws)
    is->base.fence_reference = i915_fence_reference;
    is->base.fence_finish = i915_fence_finish;
 
-   is->base.nir_options[PIPE_SHADER_VERTEX] = &gallivm_nir_options;
+   is->base.nir_options[MESA_SHADER_VERTEX] = &gallivm_nir_options;
    is->base.nir_options[PIPE_SHADER_FRAGMENT] = &i915_compiler_options;
 
    i915_init_screen_resource_functions(is);
diff --git a/src/gallium/drivers/i915/i915_state.c b/src/gallium/drivers/i915/i915_state.c
index 39a6beaaa42..37702630802 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -770,7 +770,7 @@ i915_set_constant_buffer(struct pipe_context *pipe,
    i915->current.num_user_constants[shader] = new_num;
 
    if (diff)
-      i915->dirty |= shader == PIPE_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS
+      i915->dirty |= shader == MESA_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS
                                                   : I915_NEW_FS_CONSTANTS;
 
    if (cb && cb->user_buffer) {
diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c
index e8a6c3f4eaa..65549ac8d37 100644
--- a/src/gallium/drivers/iris/iris_screen.c
+++ b/src/gallium/drivers/iris/iris_screen.c
@@ -212,7 +212,7 @@ iris_init_shader_caps(struct iris_screen *screen)
 
       caps->max_control_flow_depth = UINT_MAX;
 
-      caps->max_inputs = i == PIPE_SHADER_VERTEX ? 16 : 32;
+      caps->max_inputs = i == MESA_SHADER_VERTEX ? 16 : 32;
       caps->max_outputs = 32;
       caps->max_const_buffer0_size = 16 * 1024 * sizeof(float);
       caps->max_const_buffers = 16;
diff --git a/src/gallium/drivers/lima/lima_draw.c b/src/gallium/drivers/lima/lima_draw.c
index 2d87dc6cacf..3f100ada16d 100644
--- a/src/gallium/drivers/lima/lima_draw.c
+++ b/src/gallium/drivers/lima/lima_draw.c
@@ -289,7 +289,7 @@ lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info,
                  const struct pipe_draw_start_count_bias *draw)
 {
    struct lima_context_constant_buffer *ccb =
-      ctx->const_buffer + PIPE_SHADER_VERTEX;
+      ctx->const_buffer + MESA_SHADER_VERTEX;
    struct lima_vs_compiled_shader *vs = ctx->vs;
    struct lima_job *job = lima_job_get(ctx);
 
@@ -820,7 +820,7 @@ static void
 lima_update_gp_uniform(struct lima_context *ctx)
 {
    struct lima_context_constant_buffer *ccb =
-      ctx->const_buffer + PIPE_SHADER_VERTEX;
+      ctx->const_buffer + MESA_SHADER_VERTEX;
    struct lima_vs_compiled_shader *vs = ctx->vs;
    int uniform_size = MIN2(vs->state.uniform_size, ccb->size);
 
@@ -1004,11 +1004,11 @@ lima_draw_vbo_update(struct pipe_context *pctx,
    lima_update_gp_attribute_info(ctx, info, draw);
 
    if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
-        ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
+        ctx->const_buffer[MESA_SHADER_VERTEX].dirty) ||
        ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
        ctx->dirty & LIMA_CONTEXT_DIRTY_COMPILED_VS) {
       lima_update_gp_uniform(ctx);
-      ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
+      ctx->const_buffer[MESA_SHADER_VERTEX].dirty = false;
    }
 
    lima_update_varying(ctx, info, draw);
diff --git a/src/gallium/drivers/lima/lima_program.c b/src/gallium/drivers/lima/lima_program.c
index 12f6551344d..dcbcc32a017 100644
--- a/src/gallium/drivers/lima/lima_program.c
+++ b/src/gallium/drivers/lima/lima_program.c
@@ -94,7 +94,7 @@ const void *
 lima_program_get_compiler_options(enum pipe_shader_type shader)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return &vs_nir_options;
    case PIPE_SHADER_FRAGMENT:
       return &fs_nir_options;
diff --git a/src/gallium/drivers/lima/lima_screen.c b/src/gallium/drivers/lima/lima_screen.c
index d65b92e2376..d61253679eb 100644
--- a/src/gallium/drivers/lima/lima_screen.c
+++ b/src/gallium/drivers/lima/lima_screen.c
@@ -99,7 +99,7 @@ static void
 lima_init_shader_caps(struct pipe_screen *screen)
 {
    struct pipe_shader_caps *caps =
-      (struct pipe_shader_caps *)&screen->shader_caps[PIPE_SHADER_VERTEX];
+      (struct pipe_shader_caps *)&screen->shader_caps[MESA_SHADER_VERTEX];
 
    caps->max_instructions =
    caps->max_alu_instructions =
diff --git a/src/gallium/drivers/llvmpipe/lp_context.c b/src/gallium/drivers/llvmpipe/lp_context.c
index b4a57c160fe..d79d111a8ec 100644
--- a/src/gallium/drivers/llvmpipe/lp_context.c
+++ b/src/gallium/drivers/llvmpipe/lp_context.c
@@ -84,7 +84,7 @@ llvmpipe_destroy(struct pipe_context *pipe)
 
    util_unreference_framebuffer_state(&llvmpipe->framebuffer);
 
-   for (enum pipe_shader_type s = PIPE_SHADER_VERTEX; s < PIPE_SHADER_MESH_TYPES; s++) {
+   for (enum pipe_shader_type s = MESA_SHADER_VERTEX; s < PIPE_SHADER_MESH_TYPES; s++) {
       for (i = 0; i < ARRAY_SIZE(llvmpipe->sampler_views[0]); i++) {
          pipe_sampler_view_reference(&llvmpipe->sampler_views[s][i], NULL);
       }
diff --git a/src/gallium/drivers/llvmpipe/lp_draw_arrays.c b/src/gallium/drivers/llvmpipe/lp_draw_arrays.c
index 01ae9f585f1..56d16a9125f 100644
--- a/src/gallium/drivers/llvmpipe/lp_draw_arrays.c
+++ b/src/gallium/drivers/llvmpipe/lp_draw_arrays.c
@@ -107,8 +107,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
    }
 
    llvmpipe_prepare_vertex_sampling(lp,
-                                    lp->num_sampler_views[PIPE_SHADER_VERTEX],
-                                    lp->sampler_views[PIPE_SHADER_VERTEX]);
+                                    lp->num_sampler_views[MESA_SHADER_VERTEX],
+                                    lp->sampler_views[MESA_SHADER_VERTEX]);
    llvmpipe_prepare_geometry_sampling(lp,
                                       lp->num_sampler_views[PIPE_SHADER_GEOMETRY],
                                       lp->sampler_views[PIPE_SHADER_GEOMETRY]);
@@ -120,8 +120,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
                                        lp->sampler_views[PIPE_SHADER_TESS_EVAL]);
 
    llvmpipe_prepare_vertex_images(lp,
-                                  lp->num_images[PIPE_SHADER_VERTEX],
-                                  lp->images[PIPE_SHADER_VERTEX]);
+                                  lp->num_images[MESA_SHADER_VERTEX],
+                                  lp->images[MESA_SHADER_VERTEX]);
    llvmpipe_prepare_geometry_images(lp,
                                     lp->num_images[PIPE_SHADER_GEOMETRY],
                                     lp->images[PIPE_SHADER_GEOMETRY]);
@@ -168,12 +168,12 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
       }
    }
 
-   llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_VERTEX);
+   llvmpipe_cleanup_stage_sampling(lp, MESA_SHADER_VERTEX);
    llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_GEOMETRY);
    llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_TESS_CTRL);
    llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_TESS_EVAL);
 
-   llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_VERTEX);
+   llvmpipe_cleanup_stage_images(lp, MESA_SHADER_VERTEX);
    llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_GEOMETRY);
    llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_TESS_CTRL);
    llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_TESS_EVAL);
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c
index ec93501ef4f..d932dc2c5aa 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -135,7 +135,7 @@ llvmpipe_init_shader_caps(struct pipe_screen *screen)
          break;
       case PIPE_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
       case PIPE_SHADER_GEOMETRY:
          draw_init_shader_caps(caps);
 
diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c b/src/gallium/drivers/llvmpipe/lp_state_fs.c
index fe9fcb3aeb0..9bbe0e03d73 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_fs.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c
@@ -4244,7 +4244,7 @@ llvmpipe_set_constant_buffer(struct pipe_context *pipe,
    }
 
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
    case PIPE_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL: {
@@ -4301,7 +4301,7 @@ llvmpipe_set_shader_buffers(struct pipe_context *pipe,
       }
 
       switch (shader) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
       case PIPE_SHADER_GEOMETRY:
       case PIPE_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL: {
@@ -4361,7 +4361,7 @@ llvmpipe_set_shader_images(struct pipe_context *pipe,
 
    llvmpipe->num_images[shader] = start_slot + count;
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
    case PIPE_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL:
diff --git a/src/gallium/drivers/llvmpipe/lp_state_sampler.c b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
index 7146d3f73d3..89d67fd914c 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_sampler.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
@@ -97,7 +97,7 @@ llvmpipe_bind_sampler_states(struct pipe_context *pipe,
    }
 
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
    case PIPE_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL:
@@ -180,7 +180,7 @@ llvmpipe_set_sampler_views(struct pipe_context *pipe,
    }
 
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
    case PIPE_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL:
@@ -390,7 +390,7 @@ llvmpipe_prepare_vertex_sampling(struct llvmpipe_context *lp,
                                  unsigned num,
                                  struct pipe_sampler_view **views)
 {
-   prepare_shader_sampling(lp, num, views, PIPE_SHADER_VERTEX);
+   prepare_shader_sampling(lp, num, views, MESA_SHADER_VERTEX);
 }
 
 
@@ -549,7 +549,7 @@ llvmpipe_prepare_vertex_images(struct llvmpipe_context *lp,
                                unsigned num,
                                struct pipe_image_view *views)
 {
-   prepare_shader_images(lp, num, views, PIPE_SHADER_VERTEX);
+   prepare_shader_images(lp, num, views, MESA_SHADER_VERTEX);
 }
 
 
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
index 078e880ad2f..5027bc53fbc 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
@@ -979,7 +979,7 @@ nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *info_out)
 
    INFO("   \"prop\":{\n");
    switch (info_out->type) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          INFO("      \"vp\": {\"usesDrawParameters\":\"%s\"}\n",
                info_out->prop.vp.usesDrawParameters ? "true" : "false");
          break;
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
index 6f636c9a19f..212aed5a157 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
@@ -109,7 +109,7 @@ nv50_ir_prog_info_out_serialize(struct blob *blob,
    blob_write_bytes(blob, info_out->out, info_out->numOutputs * sizeof(info_out->out[0]));
 
    switch(info_out->type) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          blob_write_bytes(blob, &info_out->prop.vp, sizeof(info_out->prop.vp));
          break;
       case PIPE_SHADER_TESS_CTRL:
@@ -229,7 +229,7 @@ nv50_ir_prog_info_out_deserialize(void *data, size_t size, size_t offset,
    blob_copy_bytes(&reader, info_out->out, info_out->numOutputs * sizeof(info_out->out[0]));
 
    switch(info_out->type) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          blob_copy_bytes(&reader, &info_out->prop.vp, sizeof(info_out->prop.vp));
          break;
       case PIPE_SHADER_TESS_CTRL:
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_draw.c b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
index bdc5cab7608..31fbbd7e666 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_draw.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_draw.c
@@ -414,10 +414,10 @@ nv30_render_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
    if (nv30->draw_dirty & NV30_NEW_VERTCONST) {
       if (nv30->vertprog.constbuf) {
          void *map = nv04_resource(nv30->vertprog.constbuf)->data;
-         draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0,
+         draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 0,
                                          map, nv30->vertprog.constbuf_nr * 16);
       } else {
-         draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0, NULL, 0);
+         draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 0, NULL, 0);
       }
    }
 
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c b/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c
index a25789e0b9f..bf8c8958dbf 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_fragtex.c
@@ -207,7 +207,7 @@ nv30_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
    case PIPE_SHADER_FRAGMENT:
       nv30_fragtex_set_sampler_views(pipe, nr, views);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       nv40_verttex_set_sampler_views(pipe, nr, views);
       break;
    default:
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
index 1288447f367..c6e34298dc7 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
@@ -54,7 +54,7 @@ nv30_init_shader_caps(struct nv30_screen *screen)
    struct nouveau_object *eng3d = screen->eng3d;
 
    struct pipe_shader_caps *caps =
-      (struct pipe_shader_caps *)&screen->base.base.shader_caps[PIPE_SHADER_VERTEX];
+      (struct pipe_shader_caps *)&screen->base.base.shader_caps[MESA_SHADER_VERTEX];
 
    caps->max_instructions =
    caps->max_alu_instructions = (eng3d->oclass >= NV40_3D_CLASS) ? 512 : 256;
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_state.c b/src/gallium/drivers/nouveau/nv30/nv30_state.c
index 7350d1efa3f..7dae1fc663e 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_state.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_state.c
@@ -345,7 +345,7 @@ nv30_set_constant_buffer(struct pipe_context *pipe,
    if (buf)
       size = buf->width0 / (4 * sizeof(float));
 
-   if (shader == PIPE_SHADER_VERTEX) {
+   if (shader == MESA_SHADER_VERTEX) {
       if (pass_reference) {
          pipe_resource_reference(&nv30->vertprog.constbuf, NULL);
          nv30->vertprog.constbuf = buf;
diff --git a/src/gallium/drivers/nouveau/nv30/nv30_texture.c b/src/gallium/drivers/nouveau/nv30/nv30_texture.c
index 8ba749c5983..a6154960734 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_texture.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_texture.c
@@ -192,7 +192,7 @@ nv30_bind_sampler_states(struct pipe_context *pipe,
                          unsigned num_samplers, void **samplers)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       nv40_verttex_sampler_states_bind(pipe, num_samplers, samplers);
       break;
    case PIPE_SHADER_FRAGMENT:
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h b/src/gallium/drivers/nouveau/nv50/nv50_context.h
index 2280622c890..3f9741cd953 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.h
@@ -247,7 +247,7 @@ static inline unsigned
 nv50_context_shader_stage(unsigned pipe)
 {
    switch (pipe) {
-   case PIPE_SHADER_VERTEX: return NV50_SHADER_STAGE_VERTEX;
+   case MESA_SHADER_VERTEX: return NV50_SHADER_STAGE_VERTEX;
    case PIPE_SHADER_FRAGMENT: return NV50_SHADER_STAGE_FRAGMENT;
    case PIPE_SHADER_GEOMETRY: return NV50_SHADER_STAGE_GEOMETRY;
    case PIPE_SHADER_COMPUTE: return NV50_SHADER_STAGE_COMPUTE;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c b/src/gallium/drivers/nouveau/nv50/nv50_program.c
index b80ba692041..6fa7f085737 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
@@ -256,7 +256,7 @@ static int
 nv50_program_assign_varying_slots(struct nv50_ir_prog_info_out *info)
 {
    switch (info->type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return nv50_vertprog_assign_slots(info);
    case PIPE_SHADER_GEOMETRY:
       return nv50_vertprog_assign_slots(info);
@@ -332,7 +332,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t chipset,
    struct nv50_ir_prog_info *info;
    struct nv50_ir_prog_info_out info_out = {};
    int i, ret;
-   const uint8_t map_undef = (prog->type == PIPE_SHADER_VERTEX) ? 0x40 : 0x80;
+   const uint8_t map_undef = (prog->type == MESA_SHADER_VERTEX) ? 0x40 : 0x80;
 
    info = CALLOC_STRUCT(nv50_ir_prog_info);
    if (!info)
@@ -465,7 +465,7 @@ nv50_program_upload_code(struct nv50_context *nv50, struct nv50_program *prog)
    uint8_t prog_type;
 
    switch (prog->type) {
-   case PIPE_SHADER_VERTEX:   heap = nv50->screen->vp_code_heap; break;
+   case MESA_SHADER_VERTEX:   heap = nv50->screen->vp_code_heap; break;
    case PIPE_SHADER_GEOMETRY: heap = nv50->screen->gp_code_heap; break;
    case PIPE_SHADER_FRAGMENT: heap = nv50->screen->fp_code_heap; break;
    case PIPE_SHADER_COMPUTE:  heap = nv50->screen->fp_code_heap; break;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index ecfbf450db8..5378ee6eb6c 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -116,7 +116,7 @@ nv50_init_shader_caps(struct nv50_screen *screen)
       caps->max_tex_instructions =
       caps->max_tex_indirections = 16384;
       caps->max_control_flow_depth = 4;
-      caps->max_inputs = i == PIPE_SHADER_VERTEX ? 32 : 15;
+      caps->max_inputs = i == MESA_SHADER_VERTEX ? 32 : 15;
       caps->max_outputs = 16;
       caps->max_const_buffer0_size = 65536;
       caps->max_const_buffers = NV50_MAX_PIPE_CONSTBUFS;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c b/src/gallium/drivers/nouveau/nv50/nv50_state.c
index a68919f966e..5c28a34c158 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_state.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_state.c
@@ -782,7 +782,7 @@ static void *
 nv50_vp_state_create(struct pipe_context *pipe,
                      const struct pipe_shader_state *cso)
 {
-   return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
+   return nv50_sp_state_create(pipe, cso, MESA_SHADER_VERTEX);
 }
 
 static void
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index b7761dd0074..01b4076fc6e 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -815,7 +815,7 @@ nv50_blitter_make_vp(struct nv50_blitter *blit)
       0x10000811, 0x0423c789, /* mov b32 o[0x10] s[0x10] */ /* TEXC.z */
    };
 
-   blit->vp.type = PIPE_SHADER_VERTEX;
+   blit->vp.type = MESA_SHADER_VERTEX;
    blit->vp.translated = true;
    blit->vp.code = (uint32_t *)code; /* const_cast */
    blit->vp.code_size = sizeof(code);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index 2ba1dca2594..4596bf15a1d 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -296,7 +296,7 @@ static inline unsigned
 nvc0_shader_stage(unsigned pipe)
 {
    switch (pipe) {
-   case PIPE_SHADER_VERTEX: return 0;
+   case MESA_SHADER_VERTEX: return 0;
    case PIPE_SHADER_TESS_CTRL: return 1;
    case PIPE_SHADER_TESS_EVAL: return 2;
    case PIPE_SHADER_GEOMETRY: return 3;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 2f4678f591e..f5a32c57257 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -186,7 +186,7 @@ nvc0_program_assign_varying_slots(struct nv50_ir_prog_info_out *info)
 {
    int ret;
 
-   if (info->type == PIPE_SHADER_VERTEX)
+   if (info->type == MESA_SHADER_VERTEX)
       ret = nvc0_vp_assign_input_slots(info);
    else
       ret = nvc0_sp_assign_input_slots(info);
@@ -690,7 +690,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
    prog->vp.edgeflag = info_out.io.edgeFlagIn;
 
    switch (prog->type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       ret = nvc0_vp_gen_header(prog, &info_out);
       break;
    case PIPE_SHADER_TESS_CTRL:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
index f63f4f81327..285a0aef6b5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
@@ -639,7 +639,7 @@ static void *
 nvc0_vp_state_create(struct pipe_context *pipe,
                      const struct pipe_shader_state *cso)
 {
-   return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
+   return nvc0_sp_state_create(pipe, cso, MESA_SHADER_VERTEX);
 }
 
 static void
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
index 23f4493d194..4951481631e 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
@@ -856,7 +856,7 @@ nvc0_blitter_make_vp(struct pipe_context *pipe)
 {
    const nir_shader_compiler_options *options =
       nv50_ir_nir_shader_compiler_options(nouveau_screen(pipe->screen)->device->chipset,
-                                          PIPE_SHADER_VERTEX);
+                                          MESA_SHADER_VERTEX);
 
    struct nir_builder b =
       nir_builder_init_simple_shader(MESA_SHADER_VERTEX, options,
diff --git a/src/gallium/drivers/panfrost/pan_blit.c b/src/gallium/drivers/panfrost/pan_blit.c
index ca714c0c0f7..5c3ff6a6a6b 100644
--- a/src/gallium/drivers/panfrost/pan_blit.c
+++ b/src/gallium/drivers/panfrost/pan_blit.c
@@ -43,7 +43,7 @@ panfrost_blitter_save(struct panfrost_context *ctx,
                                     util_last_bit(ctx->vb_mask));
    util_blitter_save_vertex_elements(blitter, ctx->vertex);
    util_blitter_save_vertex_shader(blitter,
-                                   ctx->uncompiled[PIPE_SHADER_VERTEX]);
+                                   ctx->uncompiled[MESA_SHADER_VERTEX]);
    util_blitter_save_rasterizer(blitter, ctx->rasterizer);
    util_blitter_save_viewport(blitter, &ctx->pipe_viewport);
    util_blitter_save_so_targets(blitter, 0, NULL, 0);
diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c
index 6e3f7e5fa52..fa231c9df98 100644
--- a/src/gallium/drivers/panfrost/pan_cmdstream.c
+++ b/src/gallium/drivers/panfrost/pan_cmdstream.c
@@ -419,8 +419,8 @@ panfrost_emit_compute_shader_meta(struct panfrost_batch *batch,
 {
    struct panfrost_compiled_shader *ss = batch->ctx->prog[stage];
 
-   panfrost_batch_add_bo(batch, ss->bin.bo, PIPE_SHADER_VERTEX);
-   panfrost_batch_add_bo(batch, ss->state.bo, PIPE_SHADER_VERTEX);
+   panfrost_batch_add_bo(batch, ss->bin.bo, MESA_SHADER_VERTEX);
+   panfrost_batch_add_bo(batch, ss->state.bo, MESA_SHADER_VERTEX);
 
    return ss->state.gpu;
 }
@@ -944,7 +944,7 @@ panfrost_emit_vertex_buffers(struct panfrost_batch *batch)
       struct panfrost_resource *rsrc = pan_resource(prsrc);
       assert(!vb.is_user_buffer);
 
-      panfrost_batch_read_rsrc(batch, rsrc, PIPE_SHADER_VERTEX);
+      panfrost_batch_read_rsrc(batch, rsrc, MESA_SHADER_VERTEX);
 
       pan_pack(buffers + i, BUFFER, cfg) {
          cfg.address = rsrc->plane.base + vb.buffer_offset;
@@ -1308,7 +1308,7 @@ panfrost_upload_sysvals(struct panfrost_batch *batch, void *ptr_cpu,
       case PAN_SYSVAL_XFB: {
          unsigned buf = PAN_SYSVAL_ID(sysval);
          struct panfrost_compiled_shader *vs =
-            batch->ctx->prog[PIPE_SHADER_VERTEX];
+            batch->ctx->prog[MESA_SHADER_VERTEX];
          struct pipe_stream_output_info *so = &vs->stream_output;
          unsigned stride = so->stride[buf] * 4;
 
@@ -1328,7 +1328,7 @@ panfrost_upload_sysvals(struct panfrost_batch *batch, void *ptr_cpu,
          util_range_add(&rsrc->base, &rsrc->valid_buffer_range, offset,
                         target->buffer_size - offset);
 
-         panfrost_batch_write_rsrc(batch, rsrc, PIPE_SHADER_VERTEX);
+         panfrost_batch_write_rsrc(batch, rsrc, MESA_SHADER_VERTEX);
 
          uniforms[i].du[0] = rsrc->plane.base + offset;
          break;
@@ -2164,9 +2164,9 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
 {
    struct panfrost_context *ctx = batch->ctx;
    struct panfrost_vertex_state *so = ctx->vertex;
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    bool instanced = ctx->instance_count > 1;
-   uint32_t image_mask = ctx->image_mask[PIPE_SHADER_VERTEX];
+   uint32_t image_mask = ctx->image_mask[MESA_SHADER_VERTEX];
    unsigned nr_images = util_last_bit(image_mask);
 
    /* Worst case: everything is NPOT, which is only possible if instancing
@@ -2180,7 +2180,7 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
    unsigned count = vs->info.attribute_count;
 
    struct panfrost_compiled_shader *xfb =
-      ctx->uncompiled[PIPE_SHADER_VERTEX]->xfb;
+      ctx->uncompiled[MESA_SHADER_VERTEX]->xfb;
 
    if (xfb)
       count = MAX2(count, xfb->info.attribute_count);
@@ -2226,7 +2226,7 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
       if (!rsrc)
          continue;
 
-      panfrost_batch_read_rsrc(batch, rsrc, PIPE_SHADER_VERTEX);
+      panfrost_batch_read_rsrc(batch, rsrc, MESA_SHADER_VERTEX);
 
       /* Mask off lower bits, see offset fixup below */
       uint64_t raw_addr = rsrc->plane.base + buf->buffer_offset;
@@ -2326,9 +2326,9 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch, uint64_t *buffers)
 
    if (nr_images) {
       k = ALIGN_POT(k, 2);
-      emit_image_attribs(ctx, PIPE_SHADER_VERTEX, out + so->num_elements, k);
-      emit_image_bufs(batch, PIPE_SHADER_VERTEX, bufs + k, k);
-      k += (util_last_bit(ctx->image_mask[PIPE_SHADER_VERTEX]) * 2);
+      emit_image_attribs(ctx, MESA_SHADER_VERTEX, out + so->num_elements, k);
+      emit_image_bufs(batch, MESA_SHADER_VERTEX, bufs + k, k);
+      k += (util_last_bit(ctx->image_mask[MESA_SHADER_VERTEX]) * 2);
    }
 
 #if PAN_ARCH >= 6
@@ -2681,7 +2681,7 @@ panfrost_emit_varying_descriptor(struct panfrost_batch *batch,
                                  bool point_coord_replace)
 {
    struct panfrost_context *ctx = batch->ctx;
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    struct panfrost_compiled_shader *fs = ctx->prog[PIPE_SHADER_FRAGMENT];
 
    uint16_t point_coord_mask = 0;
@@ -2932,7 +2932,7 @@ static uint64_t
 panfrost_emit_varying_descriptors(struct panfrost_batch *batch)
 {
    struct panfrost_compiled_shader *vs =
-      batch->ctx->prog[PIPE_SHADER_VERTEX];
+      batch->ctx->prog[MESA_SHADER_VERTEX];
    struct panfrost_compiled_shader *fs =
       batch->ctx->prog[PIPE_SHADER_FRAGMENT];
 
@@ -3043,7 +3043,7 @@ panfrost_update_shader_state(struct panfrost_batch *batch,
    /* Vertex shaders need to mix vertex data and image descriptors in the
     * attribute array. This is taken care of in panfrost_update_state_3d().
     */
-   if (st != PIPE_SHADER_VERTEX && (dirty & PAN_DIRTY_STAGE_IMAGE)) {
+   if (st != MESA_SHADER_VERTEX && (dirty & PAN_DIRTY_STAGE_IMAGE)) {
       batch->attribs[st] =
          panfrost_emit_image_attribs(batch, &batch->attrib_bufs[st], st);
    }
@@ -3074,14 +3074,14 @@ panfrost_update_state_3d(struct panfrost_batch *batch)
       batch->blend = panfrost_emit_blend_valhall(batch);
 
    if (dirty & PAN_DIRTY_VERTEX) {
-      batch->attribs[PIPE_SHADER_VERTEX] = panfrost_emit_vertex_data(batch);
+      batch->attribs[MESA_SHADER_VERTEX] = panfrost_emit_vertex_data(batch);
 
-      batch->attrib_bufs[PIPE_SHADER_VERTEX] =
+      batch->attrib_bufs[MESA_SHADER_VERTEX] =
          panfrost_emit_vertex_buffers(batch);
    }
 #else
-   unsigned vt_shader_dirty = ctx->dirty_shader[PIPE_SHADER_VERTEX];
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   unsigned vt_shader_dirty = ctx->dirty_shader[MESA_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    struct panfrost_vertex_state *vstate = ctx->vertex;
    bool attr_offsetted_by_instance_base =
       vstate->attr_depends_on_base_instance_mask &
@@ -3093,8 +3093,8 @@ panfrost_update_state_3d(struct panfrost_batch *batch)
    if ((dirty & PAN_DIRTY_VERTEX) ||
        (vt_shader_dirty & (PAN_DIRTY_STAGE_IMAGE | PAN_DIRTY_STAGE_SHADER)) ||
        attr_offsetted_by_instance_base) {
-      batch->attribs[PIPE_SHADER_VERTEX] = panfrost_emit_vertex_data(
-         batch, &batch->attrib_bufs[PIPE_SHADER_VERTEX]);
+      batch->attribs[MESA_SHADER_VERTEX] = panfrost_emit_vertex_data(
+         batch, &batch->attrib_bufs[MESA_SHADER_VERTEX]);
    }
 #endif
 }
@@ -3118,40 +3118,40 @@ panfrost_launch_xfb(struct panfrost_batch *batch,
    perf_debug(batch->ctx, "Emulating transform feedback");
 
    struct panfrost_uncompiled_shader *vs_uncompiled =
-      ctx->uncompiled[PIPE_SHADER_VERTEX];
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+      ctx->uncompiled[MESA_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
 
    vs_uncompiled->xfb->stream_output = vs->stream_output;
 
-   uint64_t saved_rsd = batch->rsd[PIPE_SHADER_VERTEX];
-   uint64_t saved_ubo = batch->uniform_buffers[PIPE_SHADER_VERTEX];
-   uint64_t saved_push = batch->push_uniforms[PIPE_SHADER_VERTEX];
+   uint64_t saved_rsd = batch->rsd[MESA_SHADER_VERTEX];
+   uint64_t saved_ubo = batch->uniform_buffers[MESA_SHADER_VERTEX];
+   uint64_t saved_push = batch->push_uniforms[MESA_SHADER_VERTEX];
    unsigned saved_nr_push_uniforms =
-      batch->nr_push_uniforms[PIPE_SHADER_VERTEX];
+      batch->nr_push_uniforms[MESA_SHADER_VERTEX];
    unsigned saved_nr_ubos =
-      batch->nr_uniform_buffers[PIPE_SHADER_VERTEX];
+      batch->nr_uniform_buffers[MESA_SHADER_VERTEX];
 
-   ctx->uncompiled[PIPE_SHADER_VERTEX] = NULL; /* should not be read */
-   ctx->prog[PIPE_SHADER_VERTEX] = vs_uncompiled->xfb;
-   batch->rsd[PIPE_SHADER_VERTEX] =
-      panfrost_emit_compute_shader_meta(batch, PIPE_SHADER_VERTEX);
+   ctx->uncompiled[MESA_SHADER_VERTEX] = NULL; /* should not be read */
+   ctx->prog[MESA_SHADER_VERTEX] = vs_uncompiled->xfb;
+   batch->rsd[MESA_SHADER_VERTEX] =
+      panfrost_emit_compute_shader_meta(batch, MESA_SHADER_VERTEX);
 
-   batch->uniform_buffers[PIPE_SHADER_VERTEX] =
-      panfrost_emit_const_buf(batch, PIPE_SHADER_VERTEX,
-                              &batch->nr_uniform_buffers[PIPE_SHADER_VERTEX],
-                              &batch->push_uniforms[PIPE_SHADER_VERTEX],
-                              &batch->nr_push_uniforms[PIPE_SHADER_VERTEX]);
+   batch->uniform_buffers[MESA_SHADER_VERTEX] =
+      panfrost_emit_const_buf(batch, MESA_SHADER_VERTEX,
+                              &batch->nr_uniform_buffers[MESA_SHADER_VERTEX],
+                              &batch->push_uniforms[MESA_SHADER_VERTEX],
+                              &batch->nr_push_uniforms[MESA_SHADER_VERTEX]);
 
    JOBX(launch_xfb)(batch, info, count);
    batch->compute_count++;
 
-   ctx->uncompiled[PIPE_SHADER_VERTEX] = vs_uncompiled;
-   ctx->prog[PIPE_SHADER_VERTEX] = vs;
-   batch->rsd[PIPE_SHADER_VERTEX] = saved_rsd;
-   batch->uniform_buffers[PIPE_SHADER_VERTEX] = saved_ubo;
-   batch->push_uniforms[PIPE_SHADER_VERTEX] = saved_push;
-   batch->nr_push_uniforms[PIPE_SHADER_VERTEX] = saved_nr_push_uniforms;
-   batch->nr_uniform_buffers[PIPE_SHADER_VERTEX] = saved_nr_ubos;
+   ctx->uncompiled[MESA_SHADER_VERTEX] = vs_uncompiled;
+   ctx->prog[MESA_SHADER_VERTEX] = vs;
+   batch->rsd[MESA_SHADER_VERTEX] = saved_rsd;
+   batch->uniform_buffers[MESA_SHADER_VERTEX] = saved_ubo;
+   batch->push_uniforms[MESA_SHADER_VERTEX] = saved_push;
+   batch->nr_push_uniforms[MESA_SHADER_VERTEX] = saved_nr_push_uniforms;
+   batch->nr_uniform_buffers[MESA_SHADER_VERTEX] = saved_nr_ubos;
 }
 
 /*
@@ -3263,7 +3263,7 @@ panfrost_single_draw_direct(struct panfrost_batch *batch,
    ctx->base_instance = info->start_instance;
    ctx->drawid = drawid_offset;
 
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    bool idvs = vs->info.vs.idvs;
 
    UNUSED unsigned vertex_count =
@@ -3272,11 +3272,11 @@ panfrost_single_draw_direct(struct panfrost_batch *batch,
    panfrost_statistics_record(ctx, info, draw);
 
    panfrost_update_state_3d(batch);
-   panfrost_update_shader_state(batch, PIPE_SHADER_VERTEX);
+   panfrost_update_shader_state(batch, MESA_SHADER_VERTEX);
    panfrost_update_shader_state(batch, PIPE_SHADER_FRAGMENT);
    panfrost_clean_state_3d(ctx);
 
-   if (ctx->uncompiled[PIPE_SHADER_VERTEX]->xfb) {
+   if (ctx->uncompiled[MESA_SHADER_VERTEX]->xfb) {
       panfrost_launch_xfb(batch, info, draw->count);
    }
 
@@ -3402,7 +3402,7 @@ panfrost_draw_indirect(struct pipe_context *pipe,
    struct pipe_draw_info tmp_info = *info;
 
    panfrost_batch_read_rsrc(batch, pan_resource(indirect->buffer),
-                            PIPE_SHADER_VERTEX);
+                            MESA_SHADER_VERTEX);
 
    panfrost_update_active_prim(ctx, &tmp_info);
 
@@ -3412,12 +3412,12 @@ panfrost_draw_indirect(struct pipe_context *pipe,
    if (info->index_size) {
       struct panfrost_resource *index_buffer =
          pan_resource(info->index.resource);
-      panfrost_batch_read_rsrc(batch, index_buffer, PIPE_SHADER_VERTEX);
+      panfrost_batch_read_rsrc(batch, index_buffer, MESA_SHADER_VERTEX);
       batch->indices = index_buffer->plane.base;
    }
 
    panfrost_update_state_3d(batch);
-   panfrost_update_shader_state(batch, PIPE_SHADER_VERTEX);
+   panfrost_update_shader_state(batch, MESA_SHADER_VERTEX);
    panfrost_update_shader_state(batch, PIPE_SHADER_FRAGMENT);
    panfrost_clean_state_3d(ctx);
 
@@ -4367,7 +4367,7 @@ batch_get_polygon_list(struct panfrost_batch *batch)
       bool init_polygon_list = !has_draws;
       batch->polygon_list_bo = panfrost_batch_create_bo(
          batch, size, init_polygon_list ? 0 : PAN_BO_INVISIBLE,
-         PIPE_SHADER_VERTEX, "Polygon list");
+         MESA_SHADER_VERTEX, "Polygon list");
 
       if (!batch->polygon_list_bo) {
          mesa_loge("failed to allocate memory for polygon-list");
diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.h b/src/gallium/drivers/panfrost/pan_cmdstream.h
index 581d4ff2cad..9dd0f694494 100644
--- a/src/gallium/drivers/panfrost/pan_cmdstream.h
+++ b/src/gallium/drivers/panfrost/pan_cmdstream.h
@@ -249,7 +249,7 @@ panfrost_get_position_shader(struct panfrost_batch *batch,
                              const struct pipe_draw_info *info)
 {
    /* IDVS/points vertex shader */
-   uint64_t vs_ptr = batch->rsd[PIPE_SHADER_VERTEX];
+   uint64_t vs_ptr = batch->rsd[MESA_SHADER_VERTEX];
 
    /* IDVS/triangle vertex shader */
    if (vs_ptr && info->mode != MESA_PRIM_POINTS)
@@ -262,7 +262,7 @@ panfrost_get_position_shader(struct panfrost_batch *batch,
 static inline uint64_t
 panfrost_get_varying_shader(struct panfrost_batch *batch)
 {
-   return batch->rsd[PIPE_SHADER_VERTEX] + (2 * pan_size(SHADER_PROGRAM));
+   return batch->rsd[MESA_SHADER_VERTEX] + (2 * pan_size(SHADER_PROGRAM));
 }
 #endif
 
@@ -314,7 +314,7 @@ panfrost_emit_resources(struct panfrost_batch *batch,
    if (stage == PIPE_SHADER_FRAGMENT) {
       pan_make_resource_table(T, PAN_TABLE_ATTRIBUTE, batch->attribs[stage],
                               batch->nr_varying_attribs[PIPE_SHADER_FRAGMENT]);
-   } else if (stage == PIPE_SHADER_VERTEX) {
+   } else if (stage == MESA_SHADER_VERTEX) {
       pan_make_resource_table(T, PAN_TABLE_ATTRIBUTE, batch->attribs[stage],
                               ctx->vertex->num_elements);
 
diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 713cc6ddada..0187bd45dce 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -97,7 +97,7 @@ panfrost_clear(struct pipe_context *pipe, unsigned buffers,
 bool
 panfrost_writes_point_size(struct panfrost_context *ctx)
 {
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    assert(vs != NULL);
 
    return vs->info.vs.writes_point_size && ctx->active_prim == MESA_PRIM_POINTS;
diff --git a/src/gallium/drivers/panfrost/pan_csf.c b/src/gallium/drivers/panfrost/pan_csf.c
index aaea43fc08d..b7d5f37bbda 100644
--- a/src/gallium/drivers/panfrost/pan_csf.c
+++ b/src/gallium/drivers/panfrost/pan_csf.c
@@ -905,7 +905,7 @@ csf_emit_shader_regs(struct panfrost_batch *batch, enum pipe_shader_type stage,
 {
    uint64_t resources = panfrost_emit_resources(batch, stage);
 
-   assert(stage == PIPE_SHADER_VERTEX || stage == PIPE_SHADER_FRAGMENT ||
+   assert(stage == MESA_SHADER_VERTEX || stage == PIPE_SHADER_FRAGMENT ||
           stage == PIPE_SHADER_COMPUTE);
 
 #if PAN_ARCH >= 12
@@ -1079,8 +1079,8 @@ GENX(csf_launch_xfb)(struct panfrost_batch *batch,
    cs_move32_to(b, cs_sr_reg32(b, COMPUTE, JOB_SIZE_Y), info->instance_count);
    cs_move32_to(b, cs_sr_reg32(b, COMPUTE, JOB_SIZE_Z), 1);
 
-   csf_emit_shader_regs(batch, PIPE_SHADER_VERTEX,
-                        batch->rsd[PIPE_SHADER_VERTEX]);
+   csf_emit_shader_regs(batch, MESA_SHADER_VERTEX,
+                        batch->rsd[MESA_SHADER_VERTEX]);
    /* force a barrier to avoid read/write sync issues with buffers */
    cs_wait_slot(b, 2);
 
@@ -1114,7 +1114,7 @@ csf_emit_draw_state(struct panfrost_batch *batch,
                     const struct pipe_draw_info *info, unsigned drawid_offset)
 {
    struct panfrost_context *ctx = batch->ctx;
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    struct panfrost_compiled_shader *fs = ctx->prog[PIPE_SHADER_FRAGMENT];
 
    bool idvs = vs->info.vs.idvs;
@@ -1131,7 +1131,7 @@ csf_emit_draw_state(struct panfrost_batch *batch,
       cs_vt_start(batch->csf.cs.builder, cs_now());
    }
 
-   csf_emit_shader_regs(batch, PIPE_SHADER_VERTEX,
+   csf_emit_shader_regs(batch, MESA_SHADER_VERTEX,
       panfrost_get_position_shader(batch, info));
 
    if (fs_required) {
@@ -1357,7 +1357,7 @@ csf_emit_draw_id_register(struct panfrost_batch *batch, unsigned offset)
 {
    struct cs_builder *b = batch->csf.cs.builder;
    struct panfrost_context *ctx = batch->ctx;
-   struct panfrost_uncompiled_shader *vs = ctx->uncompiled[PIPE_SHADER_VERTEX];
+   struct panfrost_uncompiled_shader *vs = ctx->uncompiled[MESA_SHADER_VERTEX];
 
    if (!BITSET_TEST(vs->nir->info.system_values_read, SYSTEM_VALUE_DRAW_ID))
       return cs_undef();
@@ -1695,5 +1695,5 @@ GENX(csf_emit_write_timestamp)(struct panfrost_batch *batch,
    cs_move64_to(b, address, dst->plane.base + offset);
    cs_store_state(b, address, 0, MALI_CS_STATE_TIMESTAMP, cs_now());
 
-   panfrost_batch_write_rsrc(batch, dst, PIPE_SHADER_VERTEX);
+   panfrost_batch_write_rsrc(batch, dst, MESA_SHADER_VERTEX);
 }
diff --git a/src/gallium/drivers/panfrost/pan_helpers.c b/src/gallium/drivers/panfrost/pan_helpers.c
index 64d2035d345..4dd8ebd617d 100644
--- a/src/gallium/drivers/panfrost/pan_helpers.c
+++ b/src/gallium/drivers/panfrost/pan_helpers.c
@@ -104,7 +104,7 @@ panfrost_get_index_buffer(struct panfrost_batch *batch,
 
    if (!info->has_user_indices) {
       /* Only resources can be directly mapped */
-      panfrost_batch_read_rsrc(batch, rsrc, PIPE_SHADER_VERTEX);
+      panfrost_batch_read_rsrc(batch, rsrc, MESA_SHADER_VERTEX);
       return rsrc->plane.base + offset;
    } else {
       /* Otherwise, we need to upload to transient memory */
diff --git a/src/gallium/drivers/panfrost/pan_jm.c b/src/gallium/drivers/panfrost/pan_jm.c
index 2c42bf76b98..87c3ee6430e 100644
--- a/src/gallium/drivers/panfrost/pan_jm.c
+++ b/src/gallium/drivers/panfrost/pan_jm.c
@@ -468,13 +468,13 @@ jm_emit_vertex_draw(struct panfrost_batch *batch,
                     struct mali_draw_packed *section)
 {
    pan_pack(section, DRAW, cfg) {
-      cfg.state = batch->rsd[PIPE_SHADER_VERTEX];
-      cfg.attributes = batch->attribs[PIPE_SHADER_VERTEX];
-      cfg.attribute_buffers = batch->attrib_bufs[PIPE_SHADER_VERTEX];
+      cfg.state = batch->rsd[MESA_SHADER_VERTEX];
+      cfg.attributes = batch->attribs[MESA_SHADER_VERTEX];
+      cfg.attribute_buffers = batch->attrib_bufs[MESA_SHADER_VERTEX];
       cfg.varyings = batch->varyings.vs;
       cfg.varying_buffers = cfg.varyings ? batch->varyings.bufs : 0;
       cfg.thread_storage = batch->tls.gpu;
-      jm_emit_draw_descs(batch, &cfg, PIPE_SHADER_VERTEX);
+      jm_emit_draw_descs(batch, &cfg, MESA_SHADER_VERTEX);
    }
 }
 
@@ -758,7 +758,7 @@ jm_emit_malloc_vertex_job(struct panfrost_batch *batch,
                           bool secondary_shader, void *job)
 {
    struct panfrost_context *ctx = batch->ctx;
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    struct panfrost_compiled_shader *fs = ctx->prog[PIPE_SHADER_FRAGMENT];
 
    bool fs_required = panfrost_fs_required(
@@ -808,7 +808,7 @@ jm_emit_malloc_vertex_job(struct panfrost_batch *batch,
                       fs_required, u_reduced_prim(info->mode));
 
    pan_section_pack(job, MALLOC_VERTEX_JOB, POSITION, cfg) {
-      jm_emit_shader_env(batch, &cfg, PIPE_SHADER_VERTEX,
+      jm_emit_shader_env(batch, &cfg, MESA_SHADER_VERTEX,
                          panfrost_get_position_shader(batch, info));
    }
 
@@ -820,7 +820,7 @@ jm_emit_malloc_vertex_job(struct panfrost_batch *batch,
       if (!secondary_shader)
          continue;
 
-      jm_emit_shader_env(batch, &cfg, PIPE_SHADER_VERTEX,
+      jm_emit_shader_env(batch, &cfg, MESA_SHADER_VERTEX,
                          panfrost_get_varying_shader(batch));
    }
 }
@@ -876,8 +876,8 @@ GENX(jm_launch_xfb)(struct panfrost_batch *batch,
       cfg.workgroup_count_y = info->instance_count;
       cfg.workgroup_count_z = 1;
 
-      jm_emit_shader_env(batch, &cfg.compute, PIPE_SHADER_VERTEX,
-                         batch->rsd[PIPE_SHADER_VERTEX]);
+      jm_emit_shader_env(batch, &cfg.compute, MESA_SHADER_VERTEX,
+                         batch->rsd[MESA_SHADER_VERTEX]);
 
       /* TODO: Indexing. Also, this is a legacy feature... */
       cfg.compute.attribute_offset = batch->ctx->offset_start;
@@ -938,7 +938,7 @@ GENX(jm_launch_draw)(struct panfrost_batch *batch,
                      unsigned vertex_count)
 {
    struct panfrost_context *ctx = batch->ctx;
-   struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
+   struct panfrost_compiled_shader *vs = ctx->prog[MESA_SHADER_VERTEX];
    bool secondary_shader = vs->info.vs.secondary_enable;
    bool idvs = vs->info.vs.idvs;
 
@@ -1030,5 +1030,5 @@ GENX(jm_emit_write_timestamp)(struct panfrost_batch *batch,
 
    pan_jc_add_job(&batch->jm.jobs.vtc_jc, MALI_JOB_TYPE_WRITE_VALUE, false,
                   false, 0, 0, &job, false);
-   panfrost_batch_write_rsrc(batch, dst, PIPE_SHADER_VERTEX);
+   panfrost_batch_write_rsrc(batch, dst, MESA_SHADER_VERTEX);
 }
diff --git a/src/gallium/drivers/panfrost/pan_job.c b/src/gallium/drivers/panfrost/pan_job.c
index 4664d7074f1..8726b75c255 100644
--- a/src/gallium/drivers/panfrost/pan_job.c
+++ b/src/gallium/drivers/panfrost/pan_job.c
@@ -444,7 +444,7 @@ panfrost_batch_get_scratchpad(struct panfrost_batch *batch,
    } else {
       batch->scratchpad =
          panfrost_batch_create_bo(batch, size, PAN_BO_INVISIBLE,
-                                  PIPE_SHADER_VERTEX, "Thread local storage");
+                                  MESA_SHADER_VERTEX, "Thread local storage");
 
       if (batch->scratchpad)
          panfrost_batch_add_bo(batch, batch->scratchpad, PIPE_SHADER_FRAGMENT);
@@ -461,7 +461,7 @@ panfrost_batch_get_shared_memory(struct panfrost_batch *batch, unsigned size,
       assert(panfrost_bo_size(batch->shared_memory) >= size);
    } else {
       batch->shared_memory = panfrost_batch_create_bo(
-         batch, size, PAN_BO_INVISIBLE, PIPE_SHADER_VERTEX,
+         batch, size, PAN_BO_INVISIBLE, MESA_SHADER_VERTEX,
          "Workgroup shared memory");
    }
 
@@ -892,5 +892,5 @@ panfrost_batch_skip_rasterization(struct panfrost_batch *batch)
    struct pipe_rasterizer_state *rast = (void *)ctx->rasterizer;
 
    return (rast->rasterizer_discard || batch->scissor_culls_everything ||
-           !batch->rsd[PIPE_SHADER_VERTEX]);
+           !batch->rsd[MESA_SHADER_VERTEX]);
 }
diff --git a/src/gallium/drivers/panfrost/pan_screen.c b/src/gallium/drivers/panfrost/pan_screen.c
index fa2f2b96bcd..300182b01fd 100644
--- a/src/gallium/drivers/panfrost/pan_screen.c
+++ b/src/gallium/drivers/panfrost/pan_screen.c
@@ -494,7 +494,7 @@ panfrost_init_shader_caps(struct panfrost_screen *screen)
          (struct pipe_shader_caps *)&screen->base.shader_caps[i];
 
       switch (i) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
       case PIPE_SHADER_FRAGMENT:
       case PIPE_SHADER_COMPUTE:
          break;
@@ -506,7 +506,7 @@ panfrost_init_shader_caps(struct panfrost_screen *screen)
        * fragment shaders. Side effects in the geometry pipeline cause
        * trouble with IDVS and conflict with our transform feedback lowering.
        */
-      bool allow_side_effects = (i != PIPE_SHADER_VERTEX);
+      bool allow_side_effects = (i != MESA_SHADER_VERTEX);
 
       caps->max_instructions =
       caps->max_alu_instructions =
diff --git a/src/gallium/drivers/panfrost/pan_shader.c b/src/gallium/drivers/panfrost/pan_shader.c
index 1202fbd1689..652db2c8ee2 100644
--- a/src/gallium/drivers/panfrost/pan_shader.c
+++ b/src/gallium/drivers/panfrost/pan_shader.c
@@ -410,8 +410,8 @@ panfrost_update_shader_variant(struct panfrost_context *ctx,
       return;
 
    /* We need linking information, defer this */
-   if ((type == PIPE_SHADER_FRAGMENT && !ctx->uncompiled[PIPE_SHADER_VERTEX]) ||
-       (type == PIPE_SHADER_VERTEX && !ctx->uncompiled[PIPE_SHADER_FRAGMENT]))
+   if ((type == PIPE_SHADER_FRAGMENT && !ctx->uncompiled[MESA_SHADER_VERTEX]) ||
+       (type == MESA_SHADER_VERTEX && !ctx->uncompiled[PIPE_SHADER_FRAGMENT]))
       return;
 
    /* Also defer, happens with GALLIUM_HUD */
@@ -446,7 +446,7 @@ panfrost_update_shader_variant(struct panfrost_context *ctx,
 static void
 panfrost_bind_vs_state(struct pipe_context *pctx, void *hwcso)
 {
-   panfrost_bind_shader_state(pctx, hwcso, PIPE_SHADER_VERTEX);
+   panfrost_bind_shader_state(pctx, hwcso, MESA_SHADER_VERTEX);
 
    /* Fragment shaders are linked with vertex shaders */
    struct panfrost_context *ctx = pan_context(pctx);
@@ -460,7 +460,7 @@ panfrost_bind_fs_state(struct pipe_context *pctx, void *hwcso)
 
    /* Vertex shaders are linked with fragment shaders */
    struct panfrost_context *ctx = pan_context(pctx);
-   panfrost_update_shader_variant(ctx, PIPE_SHADER_VERTEX);
+   panfrost_update_shader_variant(ctx, MESA_SHADER_VERTEX);
 }
 
 static void *
diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c
index 1f07bb5ce87..187e143778b 100644
--- a/src/gallium/drivers/r300/r300_screen.c
+++ b/src/gallium/drivers/r300/r300_screen.c
@@ -423,7 +423,7 @@ static void r300_init_shader_caps(struct r300_screen* r300screen)
    bool is_r500 = r300screen->caps.is_r500;
 
    struct pipe_shader_caps *caps =
-      (struct pipe_shader_caps *)&r300screen->screen.shader_caps[PIPE_SHADER_VERTEX];
+      (struct pipe_shader_caps *)&r300screen->screen.shader_caps[MESA_SHADER_VERTEX];
 
    if (r300screen->caps.has_tcl) {
       caps->max_instructions =
diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c
index c403ed12634..81e46a5e30d 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -2074,7 +2074,7 @@ static void r300_set_constant_buffer(struct pipe_context *pipe,
         return;
 
     switch (shader) {
-        case PIPE_SHADER_VERTEX:
+        case MESA_SHADER_VERTEX:
             cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
             break;
         case PIPE_SHADER_FRAGMENT:
@@ -2097,11 +2097,11 @@ static void r300_set_constant_buffer(struct pipe_context *pipe,
     }
 
     if (shader == PIPE_SHADER_FRAGMENT ||
-        (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
+        (shader == MESA_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
         cbuf->ptr = mapped;
     }
 
-    if (shader == PIPE_SHADER_VERTEX) {
+    if (shader == MESA_SHADER_VERTEX) {
         if (r300->screen->caps.has_tcl) {
             struct r300_vertex_shader *vs = r300_vs(r300);
 
@@ -2119,7 +2119,7 @@ static void r300_set_constant_buffer(struct pipe_context *pipe,
             }
             r300_mark_atom_dirty(r300, &r300->vs_constants);
         } else if (r300->draw) {
-            draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
+            draw_set_mapped_constant_buffer(r300->draw, MESA_SHADER_VERTEX,
                 0, mapped, cb->buffer_size);
         }
     } else if (shader == PIPE_SHADER_FRAGMENT) {
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index f18fc96f87e..9c19095d275 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2353,13 +2353,13 @@ static void evergreen_emit_constant_buffers(struct r600_context *rctx,
 static void evergreen_emit_vs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
 {
 	if (rctx->vs_shader->current->shader.vs_as_ls) {
-		evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX],
+		evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[MESA_SHADER_VERTEX],
 						EG_FETCH_CONSTANTS_OFFSET_LS,
 						R_028FC0_ALU_CONST_BUFFER_SIZE_LS_0,
 						R_028F40_ALU_CONST_CACHE_LS_0,
 						0 /* PKT3 flags */);
 	} else {
-		evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX],
+		evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[MESA_SHADER_VERTEX],
 						EG_FETCH_CONSTANTS_OFFSET_VS,
 						R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
 						R_028980_ALU_CONST_CACHE_VS_0,
@@ -2477,10 +2477,10 @@ static void evergreen_emit_sampler_views(struct r600_context *rctx,
 static void evergreen_emit_vs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
 {
 	if (rctx->vs_shader->current->shader.vs_as_ls) {
-		evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views,
+		evergreen_emit_sampler_views(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views,
 					     EG_FETCH_CONSTANTS_OFFSET_LS + R600_MAX_CONST_BUFFERS, 0);
 	} else {
-		evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views,
+		evergreen_emit_sampler_views(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views,
 					     EG_FETCH_CONSTANTS_OFFSET_VS + R600_MAX_CONST_BUFFERS, 0);
 	}
 }
@@ -2846,10 +2846,10 @@ static void evergreen_emit_sampler_states(struct r600_context *rctx,
 static void evergreen_emit_vs_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
 {
 	if (rctx->vs_shader->current->shader.vs_as_ls) {
-		evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_VERTEX], 72,
+		evergreen_emit_sampler_states(rctx, &rctx->samplers[MESA_SHADER_VERTEX], 72,
 					      R_00A450_TD_LS_SAMPLER0_BORDER_COLOR_INDEX, 0);
 	} else {
-		evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_VERTEX], 18,
+		evergreen_emit_sampler_states(rctx, &rctx->samplers[MESA_SHADER_VERTEX], 18,
 					      R_00A414_TD_VS_SAMPLER0_BORDER_INDEX, 0);
 	}
 }
@@ -4818,7 +4818,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
 	r600_init_atom(rctx, &rctx->fragment_buffers.atom, id++, evergreen_emit_fragment_buffer_state, 0);
 	r600_init_atom(rctx, &rctx->compute_buffers.atom, id++, evergreen_emit_compute_buffer_state, 0);
 	/* shader const */
-	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX].atom, id++, evergreen_emit_vs_constant_buffers, 0);
+	r600_init_atom(rctx, &rctx->constbuf_state[MESA_SHADER_VERTEX].atom, id++, evergreen_emit_vs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, evergreen_emit_gs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, evergreen_emit_ps_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_TESS_CTRL].atom, id++, evergreen_emit_tcs_constant_buffers, 0);
@@ -4827,7 +4827,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
 	/* shader program */
 	r600_init_atom(rctx, &rctx->cs_shader_state.atom, id++, evergreen_emit_cs_shader, 0);
 	/* sampler */
-	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].states.atom, id++, evergreen_emit_vs_sampler_states, 0);
+	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].states.atom, id++, evergreen_emit_vs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, evergreen_emit_gs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_CTRL].states.atom, id++, evergreen_emit_tcs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].states.atom, id++, evergreen_emit_tes_sampler_states, 0);
@@ -4836,7 +4836,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
 	/* resources */
 	r600_init_atom(rctx, &rctx->vertex_buffer_state.atom, id++, evergreen_fs_emit_vertex_buffers, 0);
 	r600_init_atom(rctx, &rctx->cs_vertex_buffer_state.atom, id++, evergreen_cs_emit_vertex_buffers, 0);
-	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views.atom, id++, evergreen_emit_vs_sampler_views, 0);
+	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views.atom, id++, evergreen_emit_vs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, evergreen_emit_gs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_CTRL].views.atom, id++, evergreen_emit_tcs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].views.atom, id++, evergreen_emit_tes_sampler_views, 0);
@@ -4941,11 +4941,11 @@ void evergreen_setup_tess_constants(struct r600_context *rctx,
 		rctx->lds_alloc = 0;
 
 		if (unlikely(vertexid))
-			rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_VERTEX,
+			rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
 						      R600_LDS_INFO_CONST_BUFFER, false,
 						      &rctx->lds_constbuf_pipe);
 		else
-			rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_VERTEX,
+			rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
 						      R600_LDS_INFO_CONST_BUFFER, false,
 						      NULL);
 
@@ -5008,7 +5008,7 @@ void evergreen_setup_tess_constants(struct r600_context *rctx,
 	rctx->last_tcs = tcs;
 	rctx->last_num_tcs_input_cp = num_tcs_input_cp;
 
-	rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_VERTEX,
+	rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
 				      R600_LDS_INFO_CONST_BUFFER, false,
 				      &rctx->lds_constbuf_pipe);
 	rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_CTRL,
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 01b43c20b39..19eeca9a1db 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -1831,7 +1831,7 @@ int r600_bytecode_build(struct r600_bytecode *bc)
 	if (!bc->nstack) { // If not 0, Stack_size already provided by llvm
 		if (bc->stack.max_entries)
 			bc->nstack = bc->stack.max_entries;
-		else if (bc->type == PIPE_SHADER_VERTEX ||
+		else if (bc->type == MESA_SHADER_VERTEX ||
 			 bc->type == PIPE_SHADER_TESS_EVAL ||
 			 bc->type == PIPE_SHADER_TESS_CTRL)
 			bc->nstack = 1;
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 481b8630966..f1c7c798d3a 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -293,7 +293,7 @@ static void r600_init_shader_caps(struct r600_screen *rscreen)
 		caps->max_tex_instructions =
 		caps->max_tex_indirections = 16384;
 		caps->max_control_flow_depth = 32;
-		caps->max_inputs = i == PIPE_SHADER_VERTEX ? 16 : 32;
+		caps->max_inputs = i == MESA_SHADER_VERTEX ? 16 : 32;
 		caps->max_outputs = i == PIPE_SHADER_FRAGMENT ? 8 : 32;
 		caps->max_temps = 256; /* Max native temporaries. */
 
diff --git a/src/gallium/drivers/r600/r600_pipe_common.h b/src/gallium/drivers/r600/r600_pipe_common.h
index a17375ac8b3..9f1146e03be 100644
--- a/src/gallium/drivers/r600/r600_pipe_common.h
+++ b/src/gallium/drivers/r600/r600_pipe_common.h
@@ -48,7 +48,7 @@ struct u_log_context;
 #define R600_NOT_QUERY		0xffffffff
 
 /* Debug flags. */
-#define DBG_VS			(1 << PIPE_SHADER_VERTEX)
+#define DBG_VS			(1 << MESA_SHADER_VERTEX)
 #define DBG_PS			(1 << PIPE_SHADER_FRAGMENT)
 #define DBG_GS			(1 << PIPE_SHADER_GEOMETRY)
 #define DBG_TCS			(1 << PIPE_SHADER_TESS_CTRL)
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 5768858b5b9..31e02de8a62 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -245,7 +245,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
 			r600_update_vs_state(ctx, shader->gs_copy_shader);
 		}
 		break;
-	case PIPE_SHADER_VERTEX:
+	case MESA_SHADER_VERTEX:
 		export_shader = key.vs.as_es;
 		if (rctx->b.gfx_level >= EVERGREEN) {
 			if (key.vs.as_ls)
@@ -759,7 +759,7 @@ int generate_gs_copy_shader(struct r600_context *rctx,
 
 	ctx.shader = &cshader->shader;
 	ctx.bc = &ctx.shader->bc;
-	ctx.type = ctx.bc->type = PIPE_SHADER_VERTEX;
+	ctx.type = ctx.bc->type = MESA_SHADER_VERTEX;
 
 	r600_bytecode_init(ctx.bc, rctx->b.gfx_level, rctx->b.family,
 			   rctx->screen->has_compressed_msaa_texturing);
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index ef4c8d9b716..c4857691ff0 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1735,7 +1735,7 @@ static void r600_emit_constant_buffers(struct r600_context *rctx,
 
 static void r600_emit_vs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom)
 {
-	r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX],
+	r600_emit_constant_buffers(rctx, &rctx->constbuf_state[MESA_SHADER_VERTEX],
 				   R600_FETCH_CONSTANTS_OFFSET_VS,
 				   R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
 				   R_028980_ALU_CONST_CACHE_VS_0);
@@ -1790,7 +1790,7 @@ static void r600_emit_sampler_views(struct r600_context *rctx,
 
 static void r600_emit_vs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
 {
-	r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views, R600_FETCH_CONSTANTS_OFFSET_VS + R600_MAX_CONST_BUFFERS);
+	r600_emit_sampler_views(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views, R600_FETCH_CONSTANTS_OFFSET_VS + R600_MAX_CONST_BUFFERS);
 }
 
 static void r600_emit_gs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
@@ -1873,7 +1873,7 @@ static void r600_emit_sampler_states(struct r600_context *rctx,
 
 static void r600_emit_vs_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
 {
-	r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_VERTEX], 18, R_00A600_TD_VS_SAMPLER0_BORDER_RED);
+	r600_emit_sampler_states(rctx, &rctx->samplers[MESA_SHADER_VERTEX], 18, R_00A600_TD_VS_SAMPLER0_BORDER_RED);
 }
 
 static void r600_emit_gs_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
@@ -3065,18 +3065,18 @@ void r600_init_state_functions(struct r600_context *rctx)
 	r600_init_atom(rctx, &rctx->cb_state.atom, id++, r600_emit_framebuffer_state, 0);
 
 	/* shader const */
-	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX].atom, id++, r600_emit_vs_constant_buffers, 0);
+	r600_init_atom(rctx, &rctx->constbuf_state[MESA_SHADER_VERTEX].atom, id++, r600_emit_vs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, r600_emit_gs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, r600_emit_ps_constant_buffers, 0);
 
 	/* sampler must be emitted before TA_CNTL_AUX otherwise DISABLE_CUBE_WRAP change
 	 * does not take effect (TA_CNTL_AUX emitted by r600_emit_seamless_cube_map)
 	 */
-	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].states.atom, id++, r600_emit_vs_sampler_states, 0);
+	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].states.atom, id++, r600_emit_vs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, r600_emit_gs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].states.atom, id++, r600_emit_ps_sampler_states, 0);
 	/* resource */
-	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views.atom, id++, r600_emit_vs_sampler_views, 0);
+	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views.atom, id++, r600_emit_vs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, r600_emit_gs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views.atom, id++, r600_emit_ps_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->vertex_buffer_state.atom, id++, r600_emit_vertex_buffers, 0);
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 96ca3639dc6..d8387703513 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -264,7 +264,7 @@ static void r600_set_clip_state(struct pipe_context *ctx,
 
 	rctx->clip_state.state = *state;
 	r600_mark_atom_dirty(rctx, &rctx->clip_state.atom);
-	rctx->driver_consts[PIPE_SHADER_VERTEX].vs_ucp_dirty = true;
+	rctx->driver_consts[MESA_SHADER_VERTEX].vs_ucp_dirty = true;
 	rctx->driver_consts[PIPE_SHADER_GEOMETRY].vs_ucp_dirty = true;
 	if (rctx->b.family >= CHIP_CEDAR)
 		rctx->driver_consts[PIPE_SHADER_TESS_EVAL].vs_ucp_dirty = true;
@@ -749,7 +749,7 @@ static int r600_get_hw_atomic_count(const struct pipe_context *ctx,
 	case PIPE_SHADER_COMPUTE:
 	default:
 		break;
-	case PIPE_SHADER_VERTEX:
+	case MESA_SHADER_VERTEX:
 		value = rctx->ps_shader->info.file_count[TGSI_FILE_HW_ATOMIC];
 		break;
 	case PIPE_SHADER_GEOMETRY:
@@ -800,7 +800,7 @@ static inline void r600_shader_selector_key(const struct pipe_context *ctx,
 	memset(key, 0, sizeof(*key));
 
 	switch (sel->type) {
-	case PIPE_SHADER_VERTEX: {
+	case MESA_SHADER_VERTEX: {
 		key->vs.as_ls = (rctx->tes_shader != NULL);
 		if (!key->vs.as_ls)
 			key->vs.as_es = (rctx->gs_shader != NULL);
@@ -808,7 +808,7 @@ static inline void r600_shader_selector_key(const struct pipe_context *ctx,
 		if (rctx->ps_shader->current->shader.gs_prim_id_input && !rctx->gs_shader) {
 			key->vs.as_gs_a = true;
 		}
-		key->vs.first_atomic_counter = r600_get_hw_atomic_count(ctx, PIPE_SHADER_VERTEX);
+		key->vs.first_atomic_counter = r600_get_hw_atomic_count(ctx, MESA_SHADER_VERTEX);
 		break;
 	}
 	case PIPE_SHADER_GEOMETRY:
@@ -855,7 +855,7 @@ r600_shader_precompile_key(const struct pipe_context *ctx,
 	memset(key, 0, sizeof(*key));
 
 	switch (sel->type) {
-	case PIPE_SHADER_VERTEX:
+	case MESA_SHADER_VERTEX:
 	case PIPE_SHADER_TESS_EVAL:
 		/* Assume no tess or GS for setting .as_es.  In order to
 		 * precompile with es, we'd need the other shaders we're linked
@@ -997,7 +997,7 @@ static void *r600_create_shader_state(struct pipe_context *ctx,
 		sel->gs_num_invocations =
 			sel->info.properties[TGSI_PROPERTY_GS_INVOCATIONS];
 		break;
-	case PIPE_SHADER_VERTEX:
+	case MESA_SHADER_VERTEX:
 	case PIPE_SHADER_TESS_CTRL:
 		sel->lds_patch_outputs_written_mask = 0;
 		sel->lds_outputs_written_mask = 0;
@@ -1041,7 +1041,7 @@ static void *r600_create_ps_state(struct pipe_context *ctx,
 static void *r600_create_vs_state(struct pipe_context *ctx,
 					 const struct pipe_shader_state *state)
 {
-	return r600_create_shader_state(ctx, state, PIPE_SHADER_VERTEX);
+	return r600_create_shader_state(ctx, state, MESA_SHADER_VERTEX);
 }
 
 static void *r600_create_gs_state(struct pipe_context *ctx,
@@ -1326,7 +1326,7 @@ void r600_update_driver_const_buffers(struct r600_context *rctx, bool compute_on
 	start = compute_only ? PIPE_SHADER_COMPUTE : 0;
 	end = compute_only ? PIPE_SHADER_TYPES : PIPE_SHADER_COMPUTE;
 
-	int last_vertex_stage = PIPE_SHADER_VERTEX;
+	int last_vertex_stage = MESA_SHADER_VERTEX;
 	if (rctx->tes_shader)
 		last_vertex_stage = PIPE_SHADER_TESS_EVAL;
 	if (rctx->gs_shader)
@@ -1344,7 +1344,7 @@ void r600_update_driver_const_buffers(struct r600_context *rctx, bool compute_on
 		ptr = info->constants;
 		size = info->alloc_size;
 		if (info->vs_ucp_dirty) {
-			assert(sh == PIPE_SHADER_VERTEX ||
+			assert(sh == MESA_SHADER_VERTEX ||
 			       sh == PIPE_SHADER_GEOMETRY ||
 			       sh == PIPE_SHADER_TESS_EVAL);
 			if (!size) {
@@ -1604,13 +1604,13 @@ static void update_gs_block_state(struct r600_context *rctx, unsigned enable)
 				r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
 							 R600_GS_RING_CONST_BUFFER, false, &rctx->gs_rings.gsvs_ring);
 			} else {
-				r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_VERTEX,
+				r600_set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
 							 R600_GS_RING_CONST_BUFFER, false, &rctx->gs_rings.gsvs_ring);
 			}
 		} else {
 			r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_GEOMETRY,
 					R600_GS_RING_CONST_BUFFER, false, NULL);
-			r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_VERTEX,
+			r600_set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
 					R600_GS_RING_CONST_BUFFER, false, NULL);
 			r600_set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
 					R600_GS_RING_CONST_BUFFER, false, NULL);
@@ -2009,9 +2009,9 @@ static bool r600_update_derived_state(struct r600_context *rctx)
 		need_buf_const = rctx->vs_shader->current->shader.uses_tex_buffers || rctx->vs_shader->current->shader.has_txq_cube_array_z_comp;
 		if (need_buf_const) {
 			if (rctx->b.gfx_level < EVERGREEN)
-				r600_setup_buffer_constants(rctx, PIPE_SHADER_VERTEX);
+				r600_setup_buffer_constants(rctx, MESA_SHADER_VERTEX);
 			else
-				eg_setup_buffer_constants(rctx, PIPE_SHADER_VERTEX);
+				eg_setup_buffer_constants(rctx, MESA_SHADER_VERTEX);
 		}
 	}
 
diff --git a/src/gallium/drivers/r600/sfn/sfn_assembler.cpp b/src/gallium/drivers/r600/sfn/sfn_assembler.cpp
index d22073b1804..f4e51604f16 100644
--- a/src/gallium/drivers/r600/sfn/sfn_assembler.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_assembler.cpp
@@ -135,7 +135,7 @@ AssamblerVisitor::AssamblerVisitor(r600_shader *sh, const r600_shader_key& key,
    if (m_shader->processor_type == PIPE_SHADER_FRAGMENT)
       m_max_color_exports = MAX2(m_key.ps.nr_cbufs, 1);
 
-   if (m_shader->processor_type == PIPE_SHADER_VERTEX && m_shader->ninput > 0)
+   if (m_shader->processor_type == MESA_SHADER_VERTEX && m_shader->ninput > 0)
       r600_bytecode_add_cfinst(m_bc, CF_OP_CALL_FS);
 }
 
diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp
index e1fc0e4b158..91b5f729093 100644
--- a/src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_shader_vs.cpp
@@ -167,7 +167,7 @@ VertexExportForFs::finalize()
 void
 VertexShader::do_get_shader_info(r600_shader *sh_info)
 {
-   sh_info->processor_type = PIPE_SHADER_VERTEX;
+   sh_info->processor_type = MESA_SHADER_VERTEX;
    sh_info->vs_draw_parameters_enabled =
       m_vertex_id != nullptr || m_draw_parameters_enabled;
    m_export_stage->get_shader_info(sh_info);
diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h
index 6d2c9e5f87f..fc51ad32cd4 100644
--- a/src/gallium/drivers/radeonsi/si_build_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_build_pm4.h
@@ -549,7 +549,7 @@ si_get_user_data_base(enum amd_gfx_level gfx_level, enum si_has_tess has_tess,
                       enum pipe_shader_type shader)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       /* VS can be bound as VS, ES, LS, or GS. */
       if (has_tess) {
          if (gfx_level >= GFX10) {
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index c60aeda7d5c..09c59be6298 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -2007,7 +2007,7 @@ static void si_mark_shader_pointers_dirty(struct si_context *sctx, unsigned shad
    sctx->shader_pointers_dirty |=
       BITFIELD_RANGE(SI_DESCS_FIRST_SHADER + shader * SI_NUM_SHADER_DESCS, SI_NUM_SHADER_DESCS);
 
-   if (shader == PIPE_SHADER_VERTEX)
+   if (shader == MESA_SHADER_VERTEX)
       sctx->vertex_buffers_dirty = sctx->num_vertex_elements > 0;
 
    si_mark_atom_dirty(sctx, &sctx->atoms.s.gfx_shader_pointers);
@@ -2058,12 +2058,12 @@ static void si_set_user_data_base(struct si_context *sctx, unsigned shader, uint
  */
 void si_shader_change_notify(struct si_context *sctx)
 {
-   si_set_user_data_base(sctx, PIPE_SHADER_VERTEX,
+   si_set_user_data_base(sctx, MESA_SHADER_VERTEX,
                          si_get_user_data_base(sctx->gfx_level,
                                                sctx->shader.tes.cso ? TESS_ON : TESS_OFF,
                                                sctx->shader.gs.cso ? GS_ON : GS_OFF,
                                                sctx->ngg ? NGG_ON : NGG_OFF,
-                                               PIPE_SHADER_VERTEX));
+                                               MESA_SHADER_VERTEX));
 
    si_set_user_data_base(sctx, PIPE_SHADER_TESS_EVAL,
                          si_get_user_data_base(sctx->gfx_level,
@@ -2236,7 +2236,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
    /* Set shader pointers. */
    if (sctx->gfx_level >= GFX12) {
       gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(VERTEX),
-                                             sh_base[PIPE_SHADER_VERTEX], gfx);
+                                             sh_base[MESA_SHADER_VERTEX], gfx);
       gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_EVAL),
                                              sh_base[PIPE_SHADER_TESS_EVAL], gfx);
       gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
@@ -2266,7 +2266,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
       }
    } else if (sctx->screen->info.has_set_sh_pairs_packed) {
       gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(VERTEX),
-                                             sh_base[PIPE_SHADER_VERTEX], gfx);
+                                             sh_base[MESA_SHADER_VERTEX], gfx);
       gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_EVAL),
                                              sh_base[PIPE_SHADER_TESS_EVAL], gfx);
       gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
@@ -2297,7 +2297,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
    } else {
       radeon_begin(&sctx->gfx_cs);
       si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(VERTEX),
-                                          sh_base[PIPE_SHADER_VERTEX], gfx);
+                                          sh_base[MESA_SHADER_VERTEX], gfx);
       si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_EVAL),
                                           sh_base[PIPE_SHADER_TESS_EVAL], gfx);
       si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
@@ -2958,9 +2958,9 @@ void si_init_all_descriptors(struct si_context *sctx)
    sctx->atoms.s.gfx_shader_pointers.emit = si_emit_graphics_shader_pointers;
 
    /* Set default and immutable mappings. */
-   si_set_user_data_base(sctx, PIPE_SHADER_VERTEX,
+   si_set_user_data_base(sctx, MESA_SHADER_VERTEX,
                          si_get_user_data_base(sctx->gfx_level, TESS_OFF, GS_OFF,
-                                               sctx->ngg, PIPE_SHADER_VERTEX));
+                                               sctx->ngg, MESA_SHADER_VERTEX));
    si_set_user_data_base(sctx, PIPE_SHADER_TESS_CTRL,
                          si_get_user_data_base(sctx->gfx_level, TESS_OFF, GS_OFF,
                                                NGG_OFF, PIPE_SHADER_TESS_CTRL));
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 3c1a0655d5f..d74dfe3f2e8 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -937,7 +937,7 @@ void si_init_shader_caps(struct si_screen *sscreen)
       caps->max_tex_instructions =
       caps->max_tex_indirections =
       caps->max_control_flow_depth = 16384;
-      caps->max_inputs = i == PIPE_SHADER_VERTEX ? SI_MAX_ATTRIBS : 32;
+      caps->max_inputs = i == MESA_SHADER_VERTEX ? SI_MAX_ATTRIBS : 32;
       caps->max_outputs = i == PIPE_SHADER_FRAGMENT ? 8 : 32;
       caps->max_temps = 256; /* Max native temporaries. */
       caps->max_const_buffer0_size = 1 << 26; /* 64 MB */
diff --git a/src/gallium/drivers/radeonsi/si_sqtt.c b/src/gallium/drivers/radeonsi/si_sqtt.c
index ebbf1cfec55..ff2d5c7f163 100644
--- a/src/gallium/drivers/radeonsi/si_sqtt.c
+++ b/src/gallium/drivers/radeonsi/si_sqtt.c
@@ -700,7 +700,7 @@ static enum rgp_hardware_stages
 si_sqtt_pipe_to_rgp_shader_stage(union si_shader_key *key, enum pipe_shader_type stage)
 {
    switch (stage) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          if (key->ge.as_ls)
             return RGP_HW_STAGE_LS;
          else if (key->ge.as_es)
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 74394e9ac44..13a5d6710b5 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1415,7 +1415,7 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
    /* Used by si_get_vs_key_outputs in si_update_shaders: */
    if (old_rs->clip_plane_enable != rs->clip_plane_enable) {
       sctx->dirty_shaders_mask |=
-         BITFIELD_BIT(PIPE_SHADER_VERTEX) |
+         BITFIELD_BIT(MESA_SHADER_VERTEX) |
          BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
          BITFIELD_BIT(PIPE_SHADER_GEOMETRY);
    }
@@ -1760,7 +1760,7 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
       si_ps_key_update_dsa(sctx);
       si_update_ps_inputs_read_or_disabled(sctx);
       sctx->dirty_shaders_mask |=
-         BITFIELD_BIT(PIPE_SHADER_VERTEX) |
+         BITFIELD_BIT(MESA_SHADER_VERTEX) |
          BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
          BITFIELD_BIT(PIPE_SHADER_GEOMETRY) |
          BITFIELD_BIT(PIPE_SHADER_FRAGMENT);
@@ -2802,7 +2802,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
    si_update_ps_inputs_read_or_disabled(sctx);
    si_update_vrs_flat_shading(sctx);
    sctx->dirty_shaders_mask |=
-      BITFIELD_BIT(PIPE_SHADER_VERTEX) |
+      BITFIELD_BIT(MESA_SHADER_VERTEX) |
       BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
       BITFIELD_BIT(PIPE_SHADER_GEOMETRY) |
       BITFIELD_BIT(PIPE_SHADER_FRAGMENT);
@@ -4686,7 +4686,7 @@ static void si_bind_vertex_elements(struct pipe_context *ctx, void *state)
        memcmp(old->fix_fetch, v->fix_fetch, sizeof(v->fix_fetch[0]) *
               MAX2(old->count, v->count))) {
       si_vs_key_update_inputs(sctx);
-      sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_VERTEX);
+      sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_VERTEX);
    }
 
    if (v->instance_divisor_is_fetched) {
@@ -4766,7 +4766,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
     */
    if (sctx->vertex_elements->vb_alignment_check_mask & unaligned) {
       si_vs_key_update_inputs(sctx);
-      sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_VERTEX);
+      sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_VERTEX);
    }
 }
 
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index 5cd38a40ba3..92a7846c1b8 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -43,7 +43,7 @@ template <amd_gfx_level GFX_VERSION, si_has_tess HAS_TESS, si_has_gs HAS_GS, si_
 static bool si_update_shaders(struct si_context *sctx)
 {
    bool is_vs_state_changed =
-      (sctx->dirty_shaders_mask & BITFIELD_BIT(PIPE_SHADER_VERTEX)) != 0;
+      (sctx->dirty_shaders_mask & BITFIELD_BIT(MESA_SHADER_VERTEX)) != 0;
    bool is_tess_state_changed =
       ((sctx->dirty_shaders_mask & (BITFIELD_BIT(PIPE_SHADER_TESS_CTRL) | BITFIELD_BIT(PIPE_SHADER_TESS_EVAL))) != 0);
    bool is_gs_state_changed =
@@ -1019,7 +1019,7 @@ static void si_emit_vs_state(struct si_context *sctx, unsigned index_size)
 
       /* These are all constant expressions. */
       unsigned vs_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
-                                               PIPE_SHADER_VERTEX);
+                                               MESA_SHADER_VERTEX);
       unsigned tes_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
                                                 PIPE_SHADER_TESS_EVAL);
       unsigned gs_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
@@ -1401,7 +1401,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
    }
 
    unsigned sh_base_reg = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
-                                                PIPE_SHADER_VERTEX);
+                                                MESA_SHADER_VERTEX);
    bool render_cond_bit = sctx->render_cond_enabled;
    const unsigned tracked_base_vertex_reg =
       HAS_TESS ? SI_TRACKED_SPI_SHADER_USER_DATA_LS__BASE_VERTEX :
@@ -1846,7 +1846,7 @@ static bool si_upload_and_prefetch_VB_descriptors(struct si_context *sctx,
    unsigned count = IS_DRAW_VERTEX_STATE ? util_bitcount_fast<POPCNT>(partial_velem_mask) :
                                            sctx->num_vertex_elements;
    unsigned sh_base = si_get_user_data_base(GFX_VERSION, HAS_TESS, HAS_GS, NGG,
-                                            PIPE_SHADER_VERTEX);
+                                            MESA_SHADER_VERTEX);
    unsigned num_vbos_in_user_sgprs = si_num_vbos_in_user_sgprs_inline(GFX_VERSION);
 
    assert(count <= SI_MAX_ATTRIBS);
@@ -2296,7 +2296,7 @@ static void si_draw(struct pipe_context *ctx,
          /* Update shaders to disable VS input lowering. */
          if (sctx->uses_nontrivial_vs_inputs) {
             si_vs_key_update_inputs(sctx);
-            sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_VERTEX);
+            sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_VERTEX);
          }
       }
    } else {
@@ -2306,7 +2306,7 @@ static void si_draw(struct pipe_context *ctx,
          /* Update shaders to possibly enable VS input lowering. */
          if (sctx->uses_nontrivial_vs_inputs) {
             si_vs_key_update_inputs(sctx);
-            sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_VERTEX);
+            sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_VERTEX);
          }
       }
    }
@@ -2358,7 +2358,7 @@ static void si_draw(struct pipe_context *ctx,
       if (needs_shader_update) {
          sctx->dirty_shaders_mask |=
             (HAS_GS ? BITFIELD_BIT(PIPE_SHADER_GEOMETRY) :
-               (HAS_TESS ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(PIPE_SHADER_VERTEX)));
+               (HAS_TESS ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
       }
    }
 
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
index a738ebb20f5..cfa25bea5d7 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
@@ -2380,7 +2380,7 @@ void si_update_ps_inputs_read_or_disabled(struct si_context *sctx)
       sctx->ps_inputs_read_or_disabled = ps_inputs_read_or_disabled;
       sctx->dirty_shaders_mask |=
          (sctx->shader.gs.cso ? BITFIELD_BIT(PIPE_SHADER_GEOMETRY) :
-            (sctx->shader.tes.cso ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(PIPE_SHADER_VERTEX)));
+            (sctx->shader.tes.cso ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
    }
 }
 
@@ -2430,7 +2430,7 @@ void si_vs_ps_key_update_rast_prim_smooth_stipple(struct si_context *sctx)
 
    if (vs_key->ge.opt.kill_pointsize != old_kill_pointsize) {
       sctx->dirty_shaders_mask |=
-         BITFIELD_BIT(PIPE_SHADER_VERTEX) |
+         BITFIELD_BIT(MESA_SHADER_VERTEX) |
          BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
          BITFIELD_BIT(PIPE_SHADER_GEOMETRY);
    }
@@ -3677,7 +3677,7 @@ void si_update_common_shader_state(struct si_context *sctx, struct si_shader_sel
    else
       sctx->uses_bindless_images &= ~BITFIELD_BIT(type);
 
-   if (type == PIPE_SHADER_VERTEX || type == PIPE_SHADER_TESS_EVAL || type == PIPE_SHADER_GEOMETRY)
+   if (type == MESA_SHADER_VERTEX || type == PIPE_SHADER_TESS_EVAL || type == PIPE_SHADER_GEOMETRY)
       sctx->ngg_culling = 0; /* this will be enabled on the first draw if needed */
 
    si_invalidate_inlinable_uniforms(sctx, type);
@@ -3731,7 +3731,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
    if (si_update_ngg(sctx))
       si_shader_change_notify(sctx);
 
-   si_update_common_shader_state(sctx, sel, PIPE_SHADER_VERTEX);
+   si_update_common_shader_state(sctx, sel, MESA_SHADER_VERTEX);
    si_select_draw_vbo(sctx);
    si_update_last_vgt_stage_state(sctx, old_hw_vs, old_hw_vs_variant);
    si_vs_key_update_inputs(sctx);
@@ -4680,7 +4680,7 @@ void si_update_tess_io_layout_state(struct si_context *sctx)
       ls_current = sctx->shader.vs.current;
 
       if (!ls_current) {
-         sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_VERTEX);
+         sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_VERTEX);
          return;
       }
    }
diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 1137abf84a5..75c40dd0b30 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -228,7 +228,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx, unsigned num_targ
    if (!!sctx->streamout.enabled_mask != !!enabled_mask) {
       /* to keep/remove streamout shader code as an optimization */
       sctx->dirty_shaders_mask |=
-         BITFIELD_BIT(PIPE_SHADER_VERTEX) |
+         BITFIELD_BIT(MESA_SHADER_VERTEX) |
          BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
          BITFIELD_BIT(PIPE_SHADER_GEOMETRY);
    }
@@ -496,7 +496,7 @@ void si_update_prims_generated_query_state(struct si_context *sctx, unsigned typ
          si_shader_change_notify(sctx);
          sctx->dirty_shaders_mask |=
             (sctx->shader.gs.cso ? BITFIELD_BIT(PIPE_SHADER_GEOMETRY) :
-               (sctx->shader.tes.cso ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(PIPE_SHADER_VERTEX)));
+               (sctx->shader.tes.cso ? BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) : BITFIELD_BIT(MESA_SHADER_VERTEX)));
       }
    }
 }
diff --git a/src/gallium/drivers/softpipe/sp_context.c b/src/gallium/drivers/softpipe/sp_context.c
index e231656520c..582a3310983 100644
--- a/src/gallium/drivers/softpipe/sp_context.c
+++ b/src/gallium/drivers/softpipe/sp_context.c
@@ -270,9 +270,9 @@ softpipe_create_context(struct pipe_screen *screen,
       goto fail;
 
    draw_texture_sampler(softpipe->draw,
-                        PIPE_SHADER_VERTEX,
+                        MESA_SHADER_VERTEX,
                         (struct tgsi_sampler *)
-                           softpipe->tgsi.sampler[PIPE_SHADER_VERTEX]);
+                           softpipe->tgsi.sampler[MESA_SHADER_VERTEX]);
 
    draw_texture_sampler(softpipe->draw,
                         PIPE_SHADER_GEOMETRY,
@@ -280,9 +280,9 @@ softpipe_create_context(struct pipe_screen *screen,
                            softpipe->tgsi.sampler[PIPE_SHADER_GEOMETRY]);
 
    draw_image(softpipe->draw,
-              PIPE_SHADER_VERTEX,
+              MESA_SHADER_VERTEX,
               (struct tgsi_image *)
-              softpipe->tgsi.image[PIPE_SHADER_VERTEX]);
+              softpipe->tgsi.image[MESA_SHADER_VERTEX]);
 
    draw_image(softpipe->draw,
               PIPE_SHADER_GEOMETRY,
@@ -290,9 +290,9 @@ softpipe_create_context(struct pipe_screen *screen,
               softpipe->tgsi.image[PIPE_SHADER_GEOMETRY]);
 
    draw_buffer(softpipe->draw,
-              PIPE_SHADER_VERTEX,
+              MESA_SHADER_VERTEX,
               (struct tgsi_buffer *)
-              softpipe->tgsi.buffer[PIPE_SHADER_VERTEX]);
+              softpipe->tgsi.buffer[MESA_SHADER_VERTEX]);
 
    draw_buffer(softpipe->draw,
               PIPE_SHADER_GEOMETRY,
diff --git a/src/gallium/drivers/softpipe/sp_draw_arrays.c b/src/gallium/drivers/softpipe/sp_draw_arrays.c
index d21b67df277..d55350a2697 100644
--- a/src/gallium/drivers/softpipe/sp_draw_arrays.c
+++ b/src/gallium/drivers/softpipe/sp_draw_arrays.c
@@ -123,8 +123,8 @@ softpipe_draw_vbo(struct pipe_context *pipe,
 
    if (softpipe_screen(sp->pipe.screen)->use_llvm) {
       softpipe_prepare_vertex_sampling(sp,
-                                       sp->num_sampler_views[PIPE_SHADER_VERTEX],
-                                       sp->sampler_views[PIPE_SHADER_VERTEX]);
+                                       sp->num_sampler_views[MESA_SHADER_VERTEX],
+                                       sp->sampler_views[MESA_SHADER_VERTEX]);
       softpipe_prepare_geometry_sampling(sp,
                                          sp->num_sampler_views[PIPE_SHADER_GEOMETRY],
                                          sp->sampler_views[PIPE_SHADER_GEOMETRY]);
diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c
index 872b967daf1..535d6ae31a2 100644
--- a/src/gallium/drivers/softpipe/sp_screen.c
+++ b/src/gallium/drivers/softpipe/sp_screen.c
@@ -205,7 +205,7 @@ softpipe_init_shader_caps(struct softpipe_screen *sp_screen)
          (struct pipe_shader_caps *)&sp_screen->base.shader_caps[i];
 
       switch(i) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
       case PIPE_SHADER_GEOMETRY:
          if (sp_screen->use_llvm) {
             draw_init_shader_caps(caps);
diff --git a/src/gallium/drivers/softpipe/sp_state_derived.c b/src/gallium/drivers/softpipe/sp_state_derived.c
index 8436b320b95..14b055250fb 100644
--- a/src/gallium/drivers/softpipe/sp_state_derived.c
+++ b/src/gallium/drivers/softpipe/sp_state_derived.c
@@ -302,7 +302,7 @@ update_tgsi_samplers( struct softpipe_context *softpipe )
 {
    unsigned i, sh;
 
-   set_shader_sampler(softpipe, PIPE_SHADER_VERTEX,
+   set_shader_sampler(softpipe, MESA_SHADER_VERTEX,
                       softpipe->vs->max_sampler);
    set_shader_sampler(softpipe, PIPE_SHADER_FRAGMENT,
                       softpipe->fs_variant->info.file_max[TGSI_FILE_SAMPLER]);
diff --git a/src/gallium/drivers/softpipe/sp_state_sampler.c b/src/gallium/drivers/softpipe/sp_state_sampler.c
index 4dd3db40007..c20a328e44b 100644
--- a/src/gallium/drivers/softpipe/sp_state_sampler.c
+++ b/src/gallium/drivers/softpipe/sp_state_sampler.c
@@ -75,7 +75,7 @@ softpipe_bind_sampler_states(struct pipe_context *pipe,
       softpipe->num_samplers[shader] = j;
    }
 
-   if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
+   if (shader == MESA_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
       draw_set_samplers(softpipe->draw,
                         shader,
                         softpipe->samplers[shader],
@@ -152,7 +152,7 @@ softpipe_set_sampler_views(struct pipe_context *pipe,
       softpipe->num_sampler_views[shader] = j;
    }
 
-   if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
+   if (shader == MESA_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
       draw_set_sampler_views(softpipe->draw,
                              shader,
                              softpipe->sampler_views[shader],
@@ -299,7 +299,7 @@ softpipe_prepare_vertex_sampling(struct softpipe_context *sp,
                                  unsigned num,
                                  struct pipe_sampler_view **views)
 {
-   prepare_shader_sampling(sp, num, views, PIPE_SHADER_VERTEX,
+   prepare_shader_sampling(sp, num, views, MESA_SHADER_VERTEX,
                            sp->mapped_vs_tex);
 }
 
@@ -309,7 +309,7 @@ softpipe_cleanup_vertex_sampling(struct softpipe_context *ctx)
    unsigned i;
    for (i = 0; i < ARRAY_SIZE(ctx->mapped_vs_tex); i++) {
       sp_sampler_view_display_target_unmap(
-         ctx, ctx->sampler_views[PIPE_SHADER_VERTEX][i]);
+         ctx, ctx->sampler_views[MESA_SHADER_VERTEX][i]);
       pipe_resource_reference(&ctx->mapped_vs_tex[i], NULL);
    }
 }
diff --git a/src/gallium/drivers/softpipe/sp_state_shader.c b/src/gallium/drivers/softpipe/sp_state_shader.c
index a2ff6af1125..8abc9328f1c 100644
--- a/src/gallium/drivers/softpipe/sp_state_shader.c
+++ b/src/gallium/drivers/softpipe/sp_state_shader.c
@@ -389,7 +389,7 @@ softpipe_set_constant_buffer(struct pipe_context *pipe,
       pipe_resource_reference(&softpipe->constants[shader][index], constants);
    }
 
-   if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
+   if (shader == MESA_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) {
       draw_set_mapped_constant_buffer(softpipe->draw, shader, index, data, size);
    }
 
diff --git a/src/gallium/drivers/svga/svga_draw.c b/src/gallium/drivers/svga/svga_draw.c
index e0d925f8aea..8fbb7327f86 100644
--- a/src/gallium/drivers/svga/svga_draw.c
+++ b/src/gallium/drivers/svga/svga_draw.c
@@ -338,7 +338,7 @@ svga_validate_sampler_resources(struct svga_context *svga,
    assert(svga_have_vgpu10(svga));
 
    if (pipe_type == SVGA_PIPE_GRAPHICS) {
-      first_shader = PIPE_SHADER_VERTEX;
+      first_shader = MESA_SHADER_VERTEX;
       last_shader = PIPE_SHADER_COMPUTE;
    }
    else {
@@ -421,7 +421,7 @@ svga_validate_constant_buffers(struct svga_context *svga,
    assert(svga_have_vgpu10(svga));
 
    if (pipe_type == SVGA_PIPE_GRAPHICS) {
-      first_shader = PIPE_SHADER_VERTEX;
+      first_shader = MESA_SHADER_VERTEX;
       last_shader = PIPE_SHADER_COMPUTE;
    }
    else {
@@ -523,7 +523,7 @@ svga_validate_image_views(struct svga_context *svga,
    assert(svga_have_gl43(svga));
 
    if (pipe_type == SVGA_PIPE_GRAPHICS) {
-      first_shader = PIPE_SHADER_VERTEX;
+      first_shader = MESA_SHADER_VERTEX;
       last_shader = PIPE_SHADER_COMPUTE;
    }
    else {
@@ -562,7 +562,7 @@ svga_validate_shader_buffers(struct svga_context *svga,
    assert(svga_have_gl43(svga));
 
    if (pipe_type == SVGA_PIPE_GRAPHICS) {
-      first_shader = PIPE_SHADER_VERTEX;
+      first_shader = MESA_SHADER_VERTEX;
       last_shader = PIPE_SHADER_COMPUTE;
    }
    else {
diff --git a/src/gallium/drivers/svga/svga_pipe_constants.c b/src/gallium/drivers/svga/svga_pipe_constants.c
index bf01ef7254b..214126ebcca 100644
--- a/src/gallium/drivers/svga/svga_pipe_constants.c
+++ b/src/gallium/drivers/svga/svga_pipe_constants.c
@@ -68,7 +68,7 @@ svga_set_constant_buffer(struct pipe_context *pipe,
    if (index == 0) {
       if (shader == PIPE_SHADER_FRAGMENT)
          svga->dirty |= SVGA_NEW_FS_CONSTS;
-      else if (shader == PIPE_SHADER_VERTEX)
+      else if (shader == MESA_SHADER_VERTEX)
          svga->dirty |= SVGA_NEW_VS_CONSTS;
       else if (shader == PIPE_SHADER_GEOMETRY)
          svga->dirty |= SVGA_NEW_GS_CONSTS;
@@ -81,7 +81,7 @@ svga_set_constant_buffer(struct pipe_context *pipe,
    } else {
       if (shader == PIPE_SHADER_FRAGMENT)
          svga->dirty |= SVGA_NEW_FS_CONST_BUFFER;
-      else if (shader == PIPE_SHADER_VERTEX)
+      else if (shader == MESA_SHADER_VERTEX)
          svga->dirty |= SVGA_NEW_VS_CONST_BUFFER;
       else if (shader == PIPE_SHADER_GEOMETRY)
          svga->dirty |= SVGA_NEW_GS_CONST_BUFFER;
diff --git a/src/gallium/drivers/svga/svga_pipe_vs.c b/src/gallium/drivers/svga/svga_pipe_vs.c
index d25144aa580..74ce87fe67d 100644
--- a/src/gallium/drivers/svga/svga_pipe_vs.c
+++ b/src/gallium/drivers/svga/svga_pipe_vs.c
@@ -30,7 +30,7 @@ svga_create_vs_state(struct pipe_context *pipe,
    SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATEVS);
 
    vs = (struct svga_vertex_shader *)
-            svga_create_shader(pipe, templ, PIPE_SHADER_VERTEX,
+            svga_create_shader(pipe, templ, MESA_SHADER_VERTEX,
                                sizeof(struct svga_vertex_shader));
    if (!vs)
       goto done;
@@ -76,7 +76,7 @@ svga_bind_vs_state(struct pipe_context *pipe, void *shader)
    svga->dirty |= SVGA_NEW_VS;
 
    /* Check if the shader uses samplers */
-   svga_set_curr_shader_use_samplers_flag(svga, PIPE_SHADER_VERTEX,
+   svga_set_curr_shader_use_samplers_flag(svga, MESA_SHADER_VERTEX,
                                           svga_shader_use_samplers(&vs->base));
 }
 
diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
index e72694eb9e2..18abfe9bc2b 100644
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -210,7 +210,7 @@ vgpu9_init_shader_caps(struct svga_screen *svgascreen)
    assert(!sws->have_vgpu10);
 
    struct pipe_shader_caps *caps =
-      (struct pipe_shader_caps *)&svgascreen->screen.shader_caps[PIPE_SHADER_VERTEX];
+      (struct pipe_shader_caps *)&svgascreen->screen.shader_caps[MESA_SHADER_VERTEX];
 
    caps->max_instructions =
    caps->max_alu_instructions =
diff --git a/src/gallium/drivers/svga/svga_shader.c b/src/gallium/drivers/svga/svga_shader.c
index f928d6bbeef..483ea7ba1f5 100644
--- a/src/gallium/drivers/svga/svga_shader.c
+++ b/src/gallium/drivers/svga/svga_shader.c
@@ -782,7 +782,7 @@ svga_new_shader_variant(struct svga_context *svga, enum pipe_shader_type type)
    case PIPE_SHADER_GEOMETRY:
       variant = CALLOC(1, sizeof(struct svga_gs_variant));
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       variant = CALLOC(1, sizeof(struct svga_vs_variant));
       break;
    case PIPE_SHADER_TESS_EVAL:
diff --git a/src/gallium/drivers/svga/svga_shader.h b/src/gallium/drivers/svga/svga_shader.h
index 2f465ade278..32f373313de 100644
--- a/src/gallium/drivers/svga/svga_shader.h
+++ b/src/gallium/drivers/svga/svga_shader.h
@@ -532,7 +532,7 @@ static inline SVGA3dShaderType
 svga_shader_type(enum pipe_shader_type shader)
 {
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return SVGA3D_SHADERTYPE_VS;
    case PIPE_SHADER_GEOMETRY:
       return SVGA3D_SHADERTYPE_GS;
diff --git a/src/gallium/drivers/svga/svga_state_constants.c b/src/gallium/drivers/svga/svga_state_constants.c
index a4fc07fe874..00813feaa48 100644
--- a/src/gallium/drivers/svga/svga_state_constants.c
+++ b/src/gallium/drivers/svga/svga_state_constants.c
@@ -264,7 +264,7 @@ svga_get_extra_vs_constants(const struct svga_context *svga, float *dest)
 
    /* common constants */
    count += svga_get_extra_constants_common(svga, variant,
-                                            PIPE_SHADER_VERTEX, dest);
+                                            MESA_SHADER_VERTEX, dest);
 
    assert(count <= MAX_EXTRA_CONSTS);
 
@@ -408,7 +408,7 @@ emit_const_range(struct svga_context *svga,
    unsigned i, j;
    enum pipe_error ret;
 
-   assert(shader == PIPE_SHADER_VERTEX ||
+   assert(shader == MESA_SHADER_VERTEX ||
           shader == PIPE_SHADER_FRAGMENT);
    assert(!svga_have_vgpu10(svga));
 
@@ -446,7 +446,7 @@ emit_const_range(struct svga_context *svga,
          if (SVGA_DEBUG & DEBUG_CONSTS)
             debug_printf("%s %s %d: %f %f %f %f\n",
                          __func__,
-                         shader == PIPE_SHADER_VERTEX ? "VERT" : "FRAG",
+                         shader == MESA_SHADER_VERTEX ? "VERT" : "FRAG",
                          offset + i,
                          values[i][0],
                          values[i][1],
@@ -465,7 +465,7 @@ emit_const_range(struct svga_context *svga,
             if (SVGA_DEBUG & DEBUG_CONSTS)
                debug_printf("%s %s %d: %f %f %f %f\n",
                             __func__,
-                            shader == PIPE_SHADER_VERTEX ? "VERT" : "FRAG",
+                            shader == MESA_SHADER_VERTEX ? "VERT" : "FRAG",
                             offset + j,
                             values[j][0],
                             values[j][1],
@@ -572,7 +572,7 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
       unsigned count;
 
       switch (shader) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          variant = svga->state.hw_draw.vs;
          count = svga_get_extra_vs_constants(svga, (float *) extras);
          break;
@@ -883,7 +883,7 @@ emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
    unsigned extra_count, extra_size, extra_offset;
    const struct svga_shader_variant *variant;
 
-   assert(shader == PIPE_SHADER_VERTEX ||
+   assert(shader == MESA_SHADER_VERTEX ||
           shader == PIPE_SHADER_GEOMETRY ||
           shader == PIPE_SHADER_FRAGMENT ||
           shader == PIPE_SHADER_TESS_CTRL ||
@@ -893,7 +893,7 @@ emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
    cbuf = &svga->curr.constbufs[shader][0];
 
    switch (shader) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       variant = svga->state.hw_draw.vs;
       extra_count = svga_get_extra_vs_constants(svga, (float *) extras);
       break;
@@ -1113,9 +1113,9 @@ emit_vs_consts(struct svga_context *svga, uint64_t dirty)
    /* SVGA_NEW_VS_CONST_BUFFER
     */
    if (svga_have_vgpu10(svga)) {
-      ret = emit_consts_vgpu10(svga, PIPE_SHADER_VERTEX);
+      ret = emit_consts_vgpu10(svga, MESA_SHADER_VERTEX);
    } else {
-      ret = emit_consts_vgpu9(svga, PIPE_SHADER_VERTEX);
+      ret = emit_consts_vgpu9(svga, MESA_SHADER_VERTEX);
    }
 
    return ret;
@@ -1136,7 +1136,7 @@ emit_vs_constbuf(struct svga_context *svga, uint64_t dirty)
    /* SVGA_NEW_FS_CONSTBUF
     */
    assert(svga_have_vgpu10(svga));
-   ret = emit_constbuf_vgpu10(svga, PIPE_SHADER_VERTEX);
+   ret = emit_constbuf_vgpu10(svga, MESA_SHADER_VERTEX);
 
    return ret;
 }
@@ -1450,14 +1450,14 @@ static enum pipe_error
 update_rawbuf(struct svga_context *svga, uint64 dirty)
 {
    uint64_t rawbuf_dirtybit[] = {
-      SVGA_NEW_VS_RAW_BUFFER,       /* PIPE_SHADER_VERTEX */
+      SVGA_NEW_VS_RAW_BUFFER,       /* MESA_SHADER_VERTEX */
       SVGA_NEW_FS_RAW_BUFFER,       /* PIPE_SHADER_FRAGMENT */
       SVGA_NEW_GS_RAW_BUFFER,       /* PIPE_SHADER_GEOMETRY */
       SVGA_NEW_TCS_RAW_BUFFER,      /* PIPE_SHADER_TESS_CTRL */
       SVGA_NEW_TES_RAW_BUFFER,      /* PIPE_SHADER_TESS_EVAL */
    };
 
-   for (enum pipe_shader_type shader = PIPE_SHADER_VERTEX;
+   for (enum pipe_shader_type shader = MESA_SHADER_VERTEX;
         shader < PIPE_SHADER_COMPUTE; shader++) {
       unsigned rawbuf_mask = svga->state.raw_constbufs[shader];
       unsigned rawbuf_sbuf_mask = svga->state.raw_shaderbufs[shader];
diff --git a/src/gallium/drivers/svga/svga_state_sampler.c b/src/gallium/drivers/svga/svga_state_sampler.c
index 437749d9a0a..cd47b319661 100644
--- a/src/gallium/drivers/svga/svga_state_sampler.c
+++ b/src/gallium/drivers/svga/svga_state_sampler.c
@@ -231,7 +231,7 @@ update_sampler_resources(struct svga_context *svga, uint64_t dirty)
 
    assert(svga_have_vgpu10(svga));
 
-   for (shader = PIPE_SHADER_VERTEX; shader < PIPE_SHADER_COMPUTE; shader++) {
+   for (shader = MESA_SHADER_VERTEX; shader < PIPE_SHADER_COMPUTE; shader++) {
       SVGA3dShaderResourceViewId ids[PIPE_MAX_SAMPLERS];
       struct svga_winsys_surface *surfaces[PIPE_MAX_SAMPLERS];
       struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS];
@@ -382,7 +382,7 @@ update_samplers(struct svga_context *svga, uint64_t dirty )
 
    assert(svga_have_vgpu10(svga));
 
-   for (shader = PIPE_SHADER_VERTEX; shader < PIPE_SHADER_COMPUTE; shader++) {
+   for (shader = MESA_SHADER_VERTEX; shader < PIPE_SHADER_COMPUTE; shader++) {
       const unsigned count = svga->curr.num_samplers[shader];
       SVGA3dSamplerId ids[PIPE_MAX_SAMPLERS*2];
       unsigned i;
diff --git a/src/gallium/drivers/svga/svga_state_tgsi_transform.c b/src/gallium/drivers/svga/svga_state_tgsi_transform.c
index f0498653f53..325b824d1ca 100644
--- a/src/gallium/drivers/svga/svga_state_tgsi_transform.c
+++ b/src/gallium/drivers/svga/svga_state_tgsi_transform.c
@@ -50,7 +50,7 @@ bind_shader(struct svga_context *svga,
             struct svga_shader *shader)
 {
    switch (shader_type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       svga->pipe.bind_vs_state(&svga->pipe, shader);
       break;
    case PIPE_SHADER_FRAGMENT:
@@ -86,7 +86,7 @@ create_shader(struct svga_context *svga,
               struct pipe_shader_state *state)
 {
    switch (shader_type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return svga->pipe.create_vs_state(&svga->pipe, state);
    case PIPE_SHADER_FRAGMENT:
       /**
diff --git a/src/gallium/drivers/svga/svga_state_uav.c b/src/gallium/drivers/svga/svga_state_uav.c
index 826239a3f13..64dafe5306a 100644
--- a/src/gallium/drivers/svga/svga_state_uav.c
+++ b/src/gallium/drivers/svga/svga_state_uav.c
@@ -343,7 +343,7 @@ svga_create_uav_list(struct svga_context *svga,
    svga->state.uav_timestamp[pipe_type]++;
 
    if (pipe_type == SVGA_PIPE_GRAPHICS) {
-      first_shader = PIPE_SHADER_VERTEX;
+      first_shader = MESA_SHADER_VERTEX;
       last_shader = PIPE_SHADER_COMPUTE;
    } else {
       first_shader = PIPE_SHADER_COMPUTE;
@@ -593,7 +593,7 @@ svga_save_uav_state(struct svga_context *svga,
    unsigned i;
 
    if (pipe_type == SVGA_PIPE_GRAPHICS) {
-      first_shader = PIPE_SHADER_VERTEX;
+      first_shader = MESA_SHADER_VERTEX;
       last_shader = PIPE_SHADER_COMPUTE;
    } else {
       first_shader = PIPE_SHADER_COMPUTE;
@@ -702,7 +702,7 @@ need_to_set_uav(struct svga_context *svga,
       return true;
 
    /* If image views are different */
-   for (enum pipe_shader_type shader = PIPE_SHADER_VERTEX;
+   for (enum pipe_shader_type shader = MESA_SHADER_VERTEX;
         shader < PIPE_SHADER_COMPUTE; shader++) {
       unsigned num_image_views = svga->curr.num_image_views[shader];
       if ((num_image_views != svga->state.hw_draw.num_image_views[shader]) ||
diff --git a/src/gallium/drivers/svga/svga_state_vs.c b/src/gallium/drivers/svga/svga_state_vs.c
index 4ccd0ce469d..346cbd7d53b 100644
--- a/src/gallium/drivers/svga/svga_state_vs.c
+++ b/src/gallium/drivers/svga/svga_state_vs.c
@@ -35,7 +35,7 @@ get_dummy_vertex_shader(void)
    struct ureg_src src;
    struct ureg_dst dst;
 
-   ureg = ureg_create(PIPE_SHADER_VERTEX);
+   ureg = ureg_create(MESA_SHADER_VERTEX);
    if (!ureg)
       return NULL;
 
@@ -124,7 +124,7 @@ make_vs_key(struct svga_context *svga, struct svga_compile_key *key)
    key->vs.attrib_puint_to_sscaled = svga->curr.velems->attrib_puint_to_sscaled;
 
    /* SVGA_NEW_TEXTURE_BINDING | SVGA_NEW_SAMPLER */
-   svga_init_shader_key_common(svga, PIPE_SHADER_VERTEX, &vs->base, key);
+   svga_init_shader_key_common(svga, MESA_SHADER_VERTEX, &vs->base, key);
 
    /* SVGA_NEW_RAST */
    key->clip_plane_enable = svga->curr.rast->templ.clip_plane_enable;
@@ -204,7 +204,7 @@ compile_passthrough_vs(struct svga_context *svga,
 
    num_inputs = fs->base.tgsi_info.num_inputs;
 
-   ureg = ureg_create(PIPE_SHADER_VERTEX);
+   ureg = ureg_create(MESA_SHADER_VERTEX);
    if (!ureg)
       return PIPE_ERROR_OUT_OF_MEMORY;
 
diff --git a/src/gallium/drivers/svga/svga_surface.c b/src/gallium/drivers/svga/svga_surface.c
index 268e4a58787..c86fecc1c99 100644
--- a/src/gallium/drivers/svga/svga_surface.c
+++ b/src/gallium/drivers/svga/svga_surface.c
@@ -522,7 +522,7 @@ svga_validate_surface_view(struct svga_context *svga, struct svga_surface *s)
     * associated resource. We will then use the cloned surface view for
     * render target.
     */
-   for (shader = PIPE_SHADER_VERTEX; shader <= PIPE_SHADER_COMPUTE; shader++) {
+   for (shader = MESA_SHADER_VERTEX; shader <= PIPE_SHADER_COMPUTE; shader++) {
       if (svga_check_sampler_view_resource_collision(svga, s->handle, shader)) {
          SVGA_DBG(DEBUG_VIEWS,
                   "same resource used in shaderResource and renderTarget 0x%x\n",
diff --git a/src/gallium/drivers/svga/svga_swtnl_draw.c b/src/gallium/drivers/svga/svga_swtnl_draw.c
index 69f5371c2e8..89993bd575c 100644
--- a/src/gallium/drivers/svga/svga_swtnl_draw.c
+++ b/src/gallium/drivers/svga/svga_swtnl_draw.c
@@ -80,21 +80,21 @@ svga_swtnl_draw_vbo(struct svga_context *svga,
    }
 
    /* Map constant buffers */
-   for (i = 0; i < ARRAY_SIZE(svga->curr.constbufs[PIPE_SHADER_VERTEX]); ++i) {
-      if (svga->curr.constbufs[PIPE_SHADER_VERTEX][i].buffer == NULL) {
+   for (i = 0; i < ARRAY_SIZE(svga->curr.constbufs[MESA_SHADER_VERTEX]); ++i) {
+      if (svga->curr.constbufs[MESA_SHADER_VERTEX][i].buffer == NULL) {
          continue;
       }
 
       map = pipe_buffer_map(&svga->pipe,
-                            svga->curr.constbufs[PIPE_SHADER_VERTEX][i].buffer,
+                            svga->curr.constbufs[MESA_SHADER_VERTEX][i].buffer,
                             PIPE_MAP_READ |
                             PIPE_MAP_UNSYNCHRONIZED,
                             &cb_transfer[i]);
       assert(map);
       draw_set_mapped_constant_buffer(
-         draw, PIPE_SHADER_VERTEX, i,
+         draw, MESA_SHADER_VERTEX, i,
          map,
-         svga->curr.constbufs[PIPE_SHADER_VERTEX][i].buffer->width0);
+         svga->curr.constbufs[MESA_SHADER_VERTEX][i].buffer->width0);
    }
 
    draw_vbo(draw, info, drawid_offset, indirect, draw_one, 1,
@@ -120,8 +120,8 @@ svga_swtnl_draw_vbo(struct svga_context *svga,
       draw_set_indexes(draw, NULL, 0, 0);
    }
 
-   for (i = 0; i < ARRAY_SIZE(svga->curr.constbufs[PIPE_SHADER_VERTEX]); ++i) {
-      if (svga->curr.constbufs[PIPE_SHADER_VERTEX][i].buffer) {
+   for (i = 0; i < ARRAY_SIZE(svga->curr.constbufs[MESA_SHADER_VERTEX]); ++i) {
+      if (svga->curr.constbufs[MESA_SHADER_VERTEX][i].buffer) {
          pipe_buffer_unmap(&svga->pipe, cb_transfer[i]);
       }
    }
diff --git a/src/gallium/drivers/svga/svga_tgsi.c b/src/gallium/drivers/svga/svga_tgsi.c
index 17daf85c6bf..028ffd836b7 100644
--- a/src/gallium/drivers/svga/svga_tgsi.c
+++ b/src/gallium/drivers/svga/svga_tgsi.c
@@ -129,7 +129,7 @@ svga_shader_emit_header(struct svga_shader_emitter *emit)
    case PIPE_SHADER_FRAGMENT:
       header.value = SVGA3D_PS_30;
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       header.value = SVGA3D_VS_30;
       break;
    }
@@ -176,7 +176,7 @@ svga_tgsi_vgpu9_translate(struct svga_context *svga,
    if (unit == PIPE_SHADER_FRAGMENT)
       emit.imm_start += key->num_unnormalized_coords;
 
-   if (unit == PIPE_SHADER_VERTEX) {
+   if (unit == MESA_SHADER_VERTEX) {
       emit.imm_start += key->vs.need_prescale ? 2 : 0;
    }
 
@@ -411,7 +411,7 @@ svga_tgsi_scan_shader(struct svga_shader *shader)
    /* Convert TGSI inputs semantic.
     * Vertex shader does not have varying inputs but vertex attributes.
     */
-   if (shader->stage == PIPE_SHADER_VERTEX) {
+   if (shader->stage == MESA_SHADER_VERTEX) {
       for (unsigned i = 0; i < info->num_inputs; i++) {
          info->input_semantic_name[i] =
             svga_tgsi_to_gl_vert_attrib_semantic(
diff --git a/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c b/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c
index 48de8a937a3..b404cfc14bc 100644
--- a/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c
+++ b/src/gallium/drivers/svga/svga_tgsi_decl_sm30.c
@@ -573,14 +573,14 @@ svga_translate_decl_sm30(struct svga_shader_emitter *emit,
          break;
 
       case TGSI_FILE_INPUT:
-         if (emit->unit == PIPE_SHADER_VERTEX)
+         if (emit->unit == MESA_SHADER_VERTEX)
             ok = vs30_input(emit, decl->Semantic, idx);
          else
             ok = ps30_input(emit, decl->Semantic, idx);
          break;
 
       case TGSI_FILE_OUTPUT:
-         if (emit->unit == PIPE_SHADER_VERTEX)
+         if (emit->unit == MESA_SHADER_VERTEX)
             ok = vs30_output(emit, decl->Semantic, idx);
          else
             ok = ps30_output(emit, decl->Semantic, idx);
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c
index 34ef4abfbc2..7f3e1c5b1db 100644
--- a/src/gallium/drivers/svga/svga_tgsi_insn.c
+++ b/src/gallium/drivers/svga/svga_tgsi_insn.c
@@ -1288,7 +1288,7 @@ emit_ssg(struct svga_shader_emitter *emit,
    SVGA3dShaderDestToken temp1 = get_temp(emit);
    struct src_register zero, one;
 
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       /* SGN  DST, SRC0, TMP0, TMP1 */
       return submit_op3(emit, inst_token(SVGA3DOP_SGN), dst, src0,
                          src(temp0), src(temp1));
@@ -1494,7 +1494,7 @@ emit_select(struct svga_shader_emitter *emit,
    /* There are some SVGA instructions which implement some selects
     * directly, but they are only available in the vertex shader.
     */
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       switch (compare_func) {
       case PIPE_FUNC_GEQUAL:
          return submit_op2(emit, inst_token(SVGA3DOP_SGE), dst, src0, src1);
@@ -1556,7 +1556,7 @@ emit_cmp(struct svga_shader_emitter *emit,
    const struct src_register src2 =
       translate_src_register(emit, &insn->Src[2]);
 
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       struct src_register zero = get_zero_immediate(emit);
       /* We used to simulate CMP with SLT+LRP.  But that didn't work when
        * src1 or src2 was Inf/NaN.  In particular, GLSL sqrt(0) failed
@@ -2262,7 +2262,7 @@ static bool
 emit_dst_insn(struct svga_shader_emitter *emit,
               const struct tgsi_full_instruction *insn)
 {
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       /* SVGA/DX9 has a DST instruction, but only for vertex shaders:
        */
       return emit_simple_instruction(emit, SVGA3DOP_DST, insn);
@@ -2405,7 +2405,7 @@ static bool
 emit_lit(struct svga_shader_emitter *emit,
          const struct tgsi_full_instruction *insn)
 {
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       /* SVGA/DX9 has a LIT instruction, but only for vertex shaders:
        */
       return emit_simple_instruction(emit, SVGA3DOP_LIT, insn);
@@ -2681,7 +2681,7 @@ emit_trunc_round(struct svga_shader_emitter *emit,
    /*
     * Now we need to multiply t1 by the sign of the original value.
    */
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       /* For VS: use SGN instruction */
       /* Need two extra/dummy registers: */
       SVGA3dShaderDestToken t2 = get_temp(emit), t3 = get_temp(emit),
@@ -2767,7 +2767,7 @@ emit_call(struct svga_shader_emitter *emit,
 static bool
 emit_end(struct svga_shader_emitter *emit)
 {
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       return emit_vs_postamble(emit);
    } else {
       return emit_ps_postamble(emit);
@@ -3507,7 +3507,7 @@ needs_to_create_common_immediate(const struct svga_shader_emitter *emit)
              == PIPE_TEX_COMPARE_R_TO_TEXTURE)
             return true;
       }
-   } else if (emit->unit == PIPE_SHADER_VERTEX) {
+   } else if (emit->unit == MESA_SHADER_VERTEX) {
       if (emit->info.opcode_count[TGSI_OPCODE_CMP] >= 1)
          return true;
       if (emit->key.vs.adjust_attrib_range ||
@@ -3675,7 +3675,7 @@ svga_shader_emit_helpers(struct svga_shader_emitter *emit)
             return false;
       }
    } else {
-      assert(emit->unit == PIPE_SHADER_VERTEX);
+      assert(emit->unit == MESA_SHADER_VERTEX);
       if (emit->key.vs.adjust_attrib_range) {
          if (!emit_adjusted_vertex_attribs(emit) ||
              emit->key.vs.adjust_attrib_w_1) {
@@ -3725,7 +3725,7 @@ svga_shader_emit_instructions(struct svga_shader_emitter *emit,
    tgsi_parse_init(&parse, tokens);
    emit->internal_imm_count = 0;
 
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       ret = emit_vs_preamble(emit);
       if (!ret)
          goto done;
diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
index ecc9dd35192..6a24ea8c647 100644
--- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
+++ b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
@@ -659,7 +659,7 @@ check_register_index(struct svga_shader_emitter_v10 *emit,
    case VGPU10_OPCODE_DCL_INPUT_PS:
    case VGPU10_OPCODE_DCL_INPUT_PS_SGV:
    case VGPU10_OPCODE_DCL_INPUT_PS_SIV:
-      if ((emit->unit == PIPE_SHADER_VERTEX &&
+      if ((emit->unit == MESA_SHADER_VERTEX &&
            index >= emit->max_vs_inputs) ||
           (emit->unit == PIPE_SHADER_GEOMETRY &&
            index >= emit->max_gs_inputs) ||
@@ -682,7 +682,7 @@ check_register_index(struct svga_shader_emitter_v10 *emit,
        * VGPU11_MAX_HS_OUTPUTS.
        * Index will never be >= index >= VGPU11_MAX_HS_OUTPUTS + 2
        */
-      if ((emit->unit == PIPE_SHADER_VERTEX &&
+      if ((emit->unit == MESA_SHADER_VERTEX &&
            index >= emit->max_vs_outputs) ||
           (emit->unit == PIPE_SHADER_GEOMETRY &&
            index >= VGPU10_MAX_GS_OUTPUTS) ||
@@ -815,7 +815,7 @@ static VGPU10_PROGRAM_TYPE
 translate_shader_type(unsigned type)
 {
    switch (type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return VGPU10_VERTEX_SHADER;
    case PIPE_SHADER_GEOMETRY:
       return VGPU10_GEOMETRY_SHADER;
@@ -1274,7 +1274,7 @@ emit_dst_register(struct svga_shader_emitter_v10 *emit,
    }
 
    if (file == TGSI_FILE_OUTPUT) {
-      if (emit->unit == PIPE_SHADER_VERTEX ||
+      if (emit->unit == MESA_SHADER_VERTEX ||
           emit->unit == PIPE_SHADER_GEOMETRY ||
           emit->unit == PIPE_SHADER_TESS_EVAL) {
          if (index == emit->vposition.out_index &&
@@ -1631,7 +1631,7 @@ emit_src_register(struct svga_shader_emitter_v10 *emit,
          index = 0;
       }
    }
-   else if (emit->unit == PIPE_SHADER_VERTEX) {
+   else if (emit->unit == MESA_SHADER_VERTEX) {
       if (file == TGSI_FILE_INPUT) {
          /* if input is adjusted... */
          if ((emit->key.vs.adjust_attrib_w_1 |
@@ -5500,7 +5500,7 @@ emit_input_declarations(struct svga_shader_emitter_v10 *emit)
    case PIPE_SHADER_GEOMETRY:
       emit_gs_input_declarations(emit);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       emit_vs_input_declarations(emit);
       break;
    case PIPE_SHADER_TESS_CTRL:
@@ -5540,7 +5540,7 @@ emit_output_declarations(struct svga_shader_emitter_v10 *emit)
    case PIPE_SHADER_GEOMETRY:
       emit_gs_output_declarations(emit);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       emit_vs_output_declarations(emit);
       break;
    case PIPE_SHADER_TESS_CTRL:
@@ -5684,11 +5684,11 @@ emit_temporaries_declaration(struct svga_shader_emitter_v10 *emit)
    }
 
    if (emit->info.uses_vertexid) {
-      assert(emit->unit == PIPE_SHADER_VERTEX);
+      assert(emit->unit == MESA_SHADER_VERTEX);
       emit->vs.vertex_id_tmp_index = total_temps++;
    }
 
-   if (emit->unit == PIPE_SHADER_VERTEX || emit->unit == PIPE_SHADER_GEOMETRY) {
+   if (emit->unit == MESA_SHADER_VERTEX || emit->unit == PIPE_SHADER_GEOMETRY) {
       if (emit->vposition.need_prescale || emit->key.vs.undo_viewport ||
           emit->key.clip_plane_enable ||
           emit->vposition.so_index != INVALID_INDEX) {
@@ -5701,7 +5701,7 @@ emit_temporaries_declaration(struct svga_shader_emitter_v10 *emit)
          emit->vposition.prescale_trans_index = total_temps++;
       }
 
-      if (emit->unit == PIPE_SHADER_VERTEX) {
+      if (emit->unit == MESA_SHADER_VERTEX) {
          unsigned attrib_mask = (emit->key.vs.adjust_attrib_w_1 |
                                  emit->key.vs.adjust_attrib_itof |
                                  emit->key.vs.adjust_attrib_utof |
@@ -5978,7 +5978,7 @@ emit_constant_declaration(struct svga_shader_emitter_v10 *emit)
       total_consts += (2 * emit->vposition.num_prescale);
    }
 
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       if (emit->key.vs.undo_viewport) {
          emit->vs.viewport_index = total_consts++;
       }
@@ -6839,7 +6839,7 @@ emit_clip_distance_from_vpos(struct svga_shader_emitter_v10 *emit,
    assert(emit->clip_mode == CLIP_LEGACY);
    assert(num_clip_planes <= 8);
 
-   assert(emit->unit == PIPE_SHADER_VERTEX ||
+   assert(emit->unit == MESA_SHADER_VERTEX ||
           emit->unit == PIPE_SHADER_GEOMETRY ||
           emit->unit == PIPE_SHADER_TESS_EVAL);
 
@@ -6879,7 +6879,7 @@ emit_clip_vertex_instructions(struct svga_shader_emitter_v10 *emit)
    struct tgsi_full_src_register clipvert_src;
    const unsigned clip_vertex_tmp = emit->clip_vertex_tmp_index;
 
-   assert(emit->unit == PIPE_SHADER_VERTEX ||
+   assert(emit->unit == MESA_SHADER_VERTEX ||
           emit->unit == PIPE_SHADER_GEOMETRY ||
           emit->unit == PIPE_SHADER_TESS_EVAL);
 
@@ -11719,7 +11719,7 @@ emit_vertex_attrib_instructions(struct svga_shader_emitter_v10 *emit)
                            save_puint_to_uscaled_mask |
                            save_puint_to_sscaled_mask);
 
-   assert(emit->unit == PIPE_SHADER_VERTEX);
+   assert(emit->unit == MESA_SHADER_VERTEX);
 
    if (adjust_mask) {
       struct tgsi_full_src_register one =
@@ -12240,7 +12240,7 @@ emit_pre_helpers(struct svga_shader_emitter_v10 *emit)
       emit_sample_position_instructions(emit);
       emit_default_layer_instructions(emit);
    }
-   else if (emit->unit == PIPE_SHADER_VERTEX) {
+   else if (emit->unit == MESA_SHADER_VERTEX) {
       emit_vertex_attrib_instructions(emit);
 
       if (emit->info.uses_vertexid)
@@ -12403,7 +12403,7 @@ emit_broadcast_color_instructions(struct svga_shader_emitter_v10 *emit,
 static bool
 emit_post_helpers(struct svga_shader_emitter_v10 *emit)
 {
-   if (emit->unit == PIPE_SHADER_VERTEX) {
+   if (emit->unit == MESA_SHADER_VERTEX) {
       emit_vertex_instructions(emit);
    }
    else if (emit->unit == PIPE_SHADER_FRAGMENT) {
@@ -12920,7 +12920,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
 
    (void) make_immediate_reg_double;   /* unused at this time */
 
-   assert(unit == PIPE_SHADER_VERTEX ||
+   assert(unit == MESA_SHADER_VERTEX ||
           unit == PIPE_SHADER_GEOMETRY ||
           unit == PIPE_SHADER_FRAGMENT ||
           unit == PIPE_SHADER_TESS_CTRL ||
@@ -13095,7 +13095,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
 
    determine_clipping_mode(emit);
 
-   if (unit == PIPE_SHADER_GEOMETRY || unit == PIPE_SHADER_VERTEX ||
+   if (unit == PIPE_SHADER_GEOMETRY || unit == MESA_SHADER_VERTEX ||
        unit == PIPE_SHADER_TESS_CTRL || unit == PIPE_SHADER_TESS_EVAL) {
       if (shader->stream_output != NULL || emit->clip_mode == CLIP_DISTANCE) {
          /* if there is stream output declarations associated
diff --git a/src/gallium/drivers/v3d/v3d_blit.c b/src/gallium/drivers/v3d/v3d_blit.c
index 759849ed2fc..d5a2ffaa70d 100644
--- a/src/gallium/drivers/v3d/v3d_blit.c
+++ b/src/gallium/drivers/v3d/v3d_blit.c
@@ -614,7 +614,7 @@ v3d_get_sand8_vs(struct pipe_context *pctx)
                 return v3d->sand8_blit_vs;
 
         const struct nir_shader_compiler_options *options =
-                pscreen->nir_options[PIPE_SHADER_VERTEX];
+                pscreen->nir_options[MESA_SHADER_VERTEX];
 
         nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX,
                                                        options,
@@ -891,7 +891,7 @@ v3d_get_sand30_vs(struct pipe_context *pctx)
                 return v3d->sand30_blit_vs;
 
         const struct nir_shader_compiler_options *options =
-                pscreen->nir_options[PIPE_SHADER_VERTEX];
+                pscreen->nir_options[MESA_SHADER_VERTEX];
 
         nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX,
                                                        options,
diff --git a/src/gallium/drivers/v3d/v3d_context.c b/src/gallium/drivers/v3d/v3d_context.c
index f1bb80cc015..cb663d74700 100644
--- a/src/gallium/drivers/v3d/v3d_context.c
+++ b/src/gallium/drivers/v3d/v3d_context.c
@@ -239,7 +239,7 @@ v3d_flag_dirty_sampler_state(struct v3d_context *v3d,
                              enum pipe_shader_type shader)
 {
         switch (shader) {
-        case PIPE_SHADER_VERTEX:
+        case MESA_SHADER_VERTEX:
                 v3d->dirty |= V3D_DIRTY_VERTTEX;
                 break;
         case PIPE_SHADER_GEOMETRY:
diff --git a/src/gallium/drivers/v3d/v3d_program.c b/src/gallium/drivers/v3d/v3d_program.c
index c44ecb79f0d..d0ff895fe46 100644
--- a/src/gallium/drivers/v3d/v3d_program.c
+++ b/src/gallium/drivers/v3d/v3d_program.c
@@ -829,7 +829,7 @@ v3d_update_compiled_vs(struct v3d_context *v3d, uint8_t prim_mode)
         }
 
         memset(key, 0, sizeof(*key));
-        v3d_setup_shared_key(v3d, &key->base, &v3d->tex[PIPE_SHADER_VERTEX]);
+        v3d_setup_shared_key(v3d, &key->base, &v3d->tex[MESA_SHADER_VERTEX]);
         key->base.is_last_geometry_stage = !v3d->prog.bind_gs;
 
         if (!v3d->prog.bind_gs) {
diff --git a/src/gallium/drivers/v3d/v3d_screen.c b/src/gallium/drivers/v3d/v3d_screen.c
index da264ae66a8..a77f7cfc2ae 100644
--- a/src/gallium/drivers/v3d/v3d_screen.c
+++ b/src/gallium/drivers/v3d/v3d_screen.c
@@ -124,7 +124,7 @@ v3d_init_shader_caps(struct v3d_screen *screen)
                         (struct pipe_shader_caps *)&screen->base.shader_caps[i];
 
                 switch (i) {
-                case PIPE_SHADER_VERTEX:
+                case MESA_SHADER_VERTEX:
                 case PIPE_SHADER_FRAGMENT:
                 case PIPE_SHADER_GEOMETRY:
                         break;
@@ -143,7 +143,7 @@ v3d_init_shader_caps(struct v3d_screen *screen)
                 caps->max_control_flow_depth = UINT_MAX;
 
                 switch (i) {
-                case PIPE_SHADER_VERTEX:
+                case MESA_SHADER_VERTEX:
                         caps->max_inputs = V3D_MAX_VS_INPUTS / 4;
                         break;
                 case PIPE_SHADER_GEOMETRY:
@@ -173,7 +173,7 @@ v3d_init_shader_caps(struct v3d_screen *screen)
 
                 caps->max_shader_buffers =
                         screen->has_cache_flush &&
-                        (i != PIPE_SHADER_VERTEX && i != PIPE_SHADER_GEOMETRY) ?
+                        (i != MESA_SHADER_VERTEX && i != PIPE_SHADER_GEOMETRY) ?
                         PIPE_MAX_SHADER_BUFFERS : 0;
 
                 caps->max_shader_images =
diff --git a/src/gallium/drivers/v3d/v3dx_draw.c b/src/gallium/drivers/v3d/v3dx_draw.c
index e87d88c0684..1555c4710bb 100644
--- a/src/gallium/drivers/v3d/v3dx_draw.c
+++ b/src/gallium/drivers/v3d/v3dx_draw.c
@@ -183,7 +183,7 @@ v3d_predraw_check_stage_inputs(struct pipe_context *pctx,
         }
 
         /* Flush writes to our vertex buffers (i.e. from transform feedback) */
-        if (s == PIPE_SHADER_VERTEX) {
+        if (s == MESA_SHADER_VERTEX) {
                 BITSET_FOREACH_SET(i, v3d->vertexbuf.enabled_mask,
                                    PIPE_MAX_ATTRIBS) {
                         struct pipe_vertex_buffer *vb = &v3d->vertexbuf.vb[i];
@@ -230,7 +230,7 @@ v3d_state_reads_resource(struct v3d_context *v3d,
         unsigned i;
 
         /* Vertex buffers */
-        if (s == PIPE_SHADER_VERTEX) {
+        if (s == MESA_SHADER_VERTEX) {
                 BITSET_FOREACH_SET(i, v3d->vertexbuf.enabled_mask,
                                    PIPE_MAX_ATTRIBS) {
                         struct pipe_vertex_buffer *vb = &v3d->vertexbuf.vb[i];
@@ -706,10 +706,10 @@ v3d_emit_gl_shader_state(struct v3d_context *v3d,
 
         struct v3d_cl_reloc vs_uniforms =
                 v3d_write_uniforms(v3d, job, v3d->prog.vs,
-                                   PIPE_SHADER_VERTEX);
+                                   MESA_SHADER_VERTEX);
         struct v3d_cl_reloc cs_uniforms =
                 v3d_write_uniforms(v3d, job, v3d->prog.cs,
-                                   PIPE_SHADER_VERTEX);
+                                   MESA_SHADER_VERTEX);
 
         /* Update the cache dirty flag based on the shader progs data */
         job->tmu_dirty_rcl |= v3d->prog.cs->prog_data.vs->base.tmu_dirty_rcl;
@@ -1176,7 +1176,7 @@ v3d_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info,
          * on the last submitted render, rather than tracking the last
          * rendering to each texture's BO.
          */
-        if (v3d->tex[PIPE_SHADER_VERTEX].num_textures || (indirect && indirect->buffer)) {
+        if (v3d->tex[MESA_SHADER_VERTEX].num_textures || (indirect && indirect->buffer)) {
                 static bool warned = false;
                 if (!warned) {
                         perf_debug("Blocking binner on last render due to "
diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c
index 0aff1a08e0d..b61093465ab 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -224,7 +224,7 @@ static void *vc4_get_yuv_vs(struct pipe_context *pctx)
            return vc4->yuv_linear_blit_vs;
 
    const struct nir_shader_compiler_options *options =
-           pscreen->nir_options[PIPE_SHADER_VERTEX];
+           pscreen->nir_options[MESA_SHADER_VERTEX];
 
    nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX, options,
                                                   "linear_blit_vs");
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c
index e4b30a9a0fc..29fe7a2103d 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -243,10 +243,10 @@ vc4_emit_gl_shader_state(struct vc4_context *vc4,
                            &vc4->constbuf[PIPE_SHADER_FRAGMENT],
                            &vc4->fragtex);
         vc4_write_uniforms(vc4, vc4->prog.vs,
-                           &vc4->constbuf[PIPE_SHADER_VERTEX],
+                           &vc4->constbuf[MESA_SHADER_VERTEX],
                            &vc4->verttex);
         vc4_write_uniforms(vc4, vc4->prog.cs,
-                           &vc4->constbuf[PIPE_SHADER_VERTEX],
+                           &vc4->constbuf[MESA_SHADER_VERTEX],
                            &vc4->verttex);
 
         vc4->last_index_bias = index_bias + extra_index_bias;
diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c
index f2de48dd718..27807dbb6cb 100644
--- a/src/gallium/drivers/vc4/vc4_screen.c
+++ b/src/gallium/drivers/vc4/vc4_screen.c
@@ -139,7 +139,7 @@ vc4_init_shader_caps(struct vc4_screen *screen)
                 struct pipe_shader_caps *caps =
                         (struct pipe_shader_caps *)&screen->base.shader_caps[i];
 
-                if (i != PIPE_SHADER_VERTEX && i != PIPE_SHADER_FRAGMENT)
+                if (i != MESA_SHADER_VERTEX && i != PIPE_SHADER_FRAGMENT)
                         continue;
 
                 caps->max_instructions =
diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c
index e1354bbd5f6..2050834e419 100644
--- a/src/gallium/drivers/vc4/vc4_state.c
+++ b/src/gallium/drivers/vc4/vc4_state.c
@@ -440,7 +440,7 @@ vc4_get_stage_tex(struct vc4_context *vc4, enum pipe_shader_type shader)
                 vc4->dirty |= VC4_DIRTY_FRAGTEX;
                 return &vc4->fragtex;
                 break;
-        case PIPE_SHADER_VERTEX:
+        case MESA_SHADER_VERTEX:
                 vc4->dirty |= VC4_DIRTY_VERTTEX;
                 return &vc4->verttex;
                 break;
diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index d13ebc1c3c2..a0e1f3ba829 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -776,7 +776,7 @@ static void *virgl_shader_encoder(struct pipe_context *ctx,
 static void *virgl_create_vs_state(struct pipe_context *ctx,
                                    const struct pipe_shader_state *shader)
 {
-   return virgl_shader_encoder(ctx, shader, PIPE_SHADER_VERTEX);
+   return virgl_shader_encoder(ctx, shader, MESA_SHADER_VERTEX);
 }
 
 static void *virgl_create_tcs_state(struct pipe_context *ctx,
@@ -859,7 +859,7 @@ static void virgl_bind_vs_state(struct pipe_context *ctx,
    uint32_t handle = (unsigned long)vss;
    struct virgl_context *vctx = virgl_context(ctx);
 
-   virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_VERTEX);
+   virgl_encode_bind_shader(vctx, handle, MESA_SHADER_VERTEX);
 }
 
 static void virgl_bind_tcs_state(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index f4889cfbcbf..80eacf97285 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -1478,7 +1478,7 @@ int virgl_encoder_destroy_sub_ctx(struct virgl_context *ctx, uint32_t sub_ctx_id
 int virgl_encode_link_shader(struct virgl_context *ctx, uint32_t *handles)
 {
    virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_LINK_SHADER, 0, VIRGL_LINK_SHADER_SIZE));
-   virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_VERTEX]);
+   virgl_encoder_write_dword(ctx->cbuf, handles[MESA_SHADER_VERTEX]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_FRAGMENT]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_GEOMETRY]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_TESS_CTRL]);
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 17631844175..d81b90d1758 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -199,7 +199,7 @@ virgl_init_shader_caps(struct virgl_screen *vscreen)
       caps->max_inputs =
          vscreen->caps.caps.v1.glsl_level < 150 ?
          vscreen->caps.caps.v2.max_vertex_attribs :
-         (i == PIPE_SHADER_VERTEX || i == PIPE_SHADER_GEOMETRY ?
+         (i == MESA_SHADER_VERTEX || i == PIPE_SHADER_GEOMETRY ?
           vscreen->caps.caps.v2.max_vertex_attribs : 32);
 
       switch (i) {
diff --git a/src/gallium/drivers/virgl/virgl_screen.h b/src/gallium/drivers/virgl/virgl_screen.h
index ba0f769ee60..a960127f872 100644
--- a/src/gallium/drivers/virgl/virgl_screen.h
+++ b/src/gallium/drivers/virgl/virgl_screen.h
@@ -93,7 +93,7 @@ static inline enum virgl_shader_stage
 virgl_shader_stage_convert(enum pipe_shader_type type)
 {
    switch (type) {
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       return VIRGL_SHADER_VERTEX;
    case PIPE_SHADER_TESS_CTRL:
       return VIRGL_SHADER_TESS_CTRL;
diff --git a/src/gallium/frontends/d3d10umd/Device.cpp b/src/gallium/frontends/d3d10umd/Device.cpp
index 0ec9f88da38..12052f06255 100644
--- a/src/gallium/frontends/d3d10umd/Device.cpp
+++ b/src/gallium/frontends/d3d10umd/Device.cpp
@@ -135,7 +135,7 @@ CreateDevice(D3D10DDI_HADAPTER hAdapter,                 // IN
    pDevice->pipe = pipe;
    pDevice->cso = cso_create_context(pipe, CSO_NO_VBUF);
 
-   pDevice->empty_vs = CreateEmptyShader(pDevice, PIPE_SHADER_VERTEX);
+   pDevice->empty_vs = CreateEmptyShader(pDevice, MESA_SHADER_VERTEX);
    pDevice->empty_fs = CreateEmptyShader(pDevice, PIPE_SHADER_FRAGMENT);
 
    pipe->bind_vs_state(pipe, pDevice->empty_vs);
@@ -339,7 +339,7 @@ DestroyDevice(D3D10DDI_HDEVICE hDevice)   // IN
    cso_destroy_context(pDevice->cso);
 
    DeleteEmptyShader(pDevice, PIPE_SHADER_FRAGMENT, pDevice->empty_fs);
-   DeleteEmptyShader(pDevice, PIPE_SHADER_VERTEX, pDevice->empty_vs);
+   DeleteEmptyShader(pDevice, MESA_SHADER_VERTEX, pDevice->empty_vs);
 
    util_unreference_framebuffer_state(&pDevice->fb);
 
@@ -355,7 +355,7 @@ DestroyDevice(D3D10DDI_HDEVICE hDevice)   // IN
    memset(sampler_views, 0, sizeof sampler_views);
    pipe->set_sampler_views(pipe, PIPE_SHADER_FRAGMENT, 0,
                            PIPE_MAX_SHADER_SAMPLER_VIEWS, 0, sampler_views);
-   pipe->set_sampler_views(pipe, PIPE_SHADER_VERTEX, 0,
+   pipe->set_sampler_views(pipe, MESA_SHADER_VERTEX, 0,
                            PIPE_MAX_SHADER_SAMPLER_VIEWS, 0, sampler_views);
    pipe->set_sampler_views(pipe, PIPE_SHADER_GEOMETRY, 0,
                            PIPE_MAX_SHADER_SAMPLER_VIEWS, 0, sampler_views);
diff --git a/src/gallium/frontends/d3d10umd/Shader.cpp b/src/gallium/frontends/d3d10umd/Shader.cpp
index 23fbf80ae85..79581f7a672 100644
--- a/src/gallium/frontends/d3d10umd/Shader.cpp
+++ b/src/gallium/frontends/d3d10umd/Shader.cpp
@@ -89,7 +89,7 @@ CreateEmptyShader(Device *pDevice,
    case PIPE_SHADER_FRAGMENT:
       handle = pipe->create_fs_state(pipe, &state);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       handle = pipe->create_vs_state(pipe, &state);
       break;
    case PIPE_SHADER_GEOMETRY:
@@ -133,7 +133,7 @@ DeleteEmptyShader(Device *pDevice,
    case PIPE_SHADER_FRAGMENT:
       pipe->delete_fs_state(pipe, handle);
       break;
-   case PIPE_SHADER_VERTEX:
+   case MESA_SHADER_VERTEX:
       pipe->delete_vs_state(pipe, handle);
       break;
    case PIPE_SHADER_GEOMETRY:
@@ -303,7 +303,7 @@ DestroyShader(D3D10DDI_HDEVICE hDevice,   // IN
       case PIPE_SHADER_FRAGMENT:
          pipe->delete_fs_state(pipe, pShader->handle);
          break;
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          pipe->delete_vs_state(pipe, pShader->handle);
          break;
       case PIPE_SHADER_GEOMETRY:
@@ -544,7 +544,7 @@ CreateVertexShader(D3D10DDI_HDEVICE hDevice,                                  //
    struct pipe_context *pipe = CastPipeContext(hDevice);
    Shader *pShader = CastShader(hShader);
 
-   pShader->type = PIPE_SHADER_VERTEX;
+   pShader->type = MESA_SHADER_VERTEX;
    pShader->output_resolved = true;
 
    memset(&pShader->state, 0, sizeof pShader->state);
@@ -606,7 +606,7 @@ VsSetShaderResources(D3D10DDI_HDEVICE hDevice,
 {
    LOG_ENTRYPOINT();
 
-   SetShaderResources(PIPE_SHADER_VERTEX, hDevice, Offset, NumViews, phShaderResourceViews);
+   SetShaderResources(MESA_SHADER_VERTEX, hDevice, Offset, NumViews, phShaderResourceViews);
 
 }
 
@@ -630,7 +630,7 @@ VsSetConstantBuffers(D3D10DDI_HDEVICE hDevice,
 {
    LOG_ENTRYPOINT();
 
-   SetConstantBuffers(PIPE_SHADER_VERTEX,
+   SetConstantBuffers(MESA_SHADER_VERTEX,
                       hDevice, StartBuffer, NumBuffers, phBuffers);
 }
 
@@ -653,7 +653,7 @@ VsSetSamplers(D3D10DDI_HDEVICE hDevice,                                       //
 {
    LOG_ENTRYPOINT();
 
-   SetSamplers(PIPE_SHADER_VERTEX, hDevice, Offset, NumSamplers, phSamplers);
+   SetSamplers(MESA_SHADER_VERTEX, hDevice, Offset, NumSamplers, phSamplers);
 
 }
 
diff --git a/src/gallium/frontends/d3d10umd/ShaderTGSI.c b/src/gallium/frontends/d3d10umd/ShaderTGSI.c
index 25d7d458af7..805c14b3bad 100644
--- a/src/gallium/frontends/d3d10umd/ShaderTGSI.c
+++ b/src/gallium/frontends/d3d10umd/ShaderTGSI.c
@@ -1278,7 +1278,7 @@ Shader_tgsi_translate(const unsigned *code,
       ureg = ureg_create(PIPE_SHADER_FRAGMENT);
       break;
    case D3D10_SB_VERTEX_SHADER:
-      ureg = ureg_create(PIPE_SHADER_VERTEX);
+      ureg = ureg_create(MESA_SHADER_VERTEX);
       break;
    case D3D10_SB_GEOMETRY_SHADER:
       ureg = ureg_create(PIPE_SHADER_GEOMETRY);
diff --git a/src/gallium/tools/trace/dump_state.py b/src/gallium/tools/trace/dump_state.py
index 62ed304cc5c..2303b97b56a 100755
--- a/src/gallium/tools/trace/dump_state.py
+++ b/src/gallium/tools/trace/dump_state.py
@@ -410,7 +410,7 @@ class Context(Dispatcher):
         sys.stdout.flush()
 
     def _get_stage_state(self, shader):
-        if shader == 'PIPE_SHADER_VERTEX':
+        if shader == 'MESA_SHADER_VERTEX':
             return self._state.vs
         if shader == 'PIPE_SHADER_TESS_CTRL':
             return self._state.tcs
diff --git a/src/mesa/state_tracker/st_atom_constbuf.c b/src/mesa/state_tracker/st_atom_constbuf.c
index bd4903a5160..10f2f889415 100644
--- a/src/mesa/state_tracker/st_atom_constbuf.c
+++ b/src/mesa/state_tracker/st_atom_constbuf.c
@@ -77,7 +77,7 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, gl_shader_st
 
    struct gl_program_parameter_list *params = prog->Parameters;
 
-   assert(shader_type == PIPE_SHADER_VERTEX ||
+   assert(shader_type == MESA_SHADER_VERTEX ||
           shader_type == PIPE_SHADER_FRAGMENT ||
           shader_type == PIPE_SHADER_GEOMETRY ||
           shader_type == PIPE_SHADER_TESS_CTRL ||
@@ -314,7 +314,7 @@ st_bind_vs_ubos(struct st_context *st)
    struct gl_program *prog =
       st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
 
-   st_bind_ubos(st, prog, PIPE_SHADER_VERTEX);
+   st_bind_ubos(st, prog, MESA_SHADER_VERTEX);
 }
 
 void
diff --git a/src/mesa/state_tracker/st_atom_image.c b/src/mesa/state_tracker/st_atom_image.c
index e415b3d76b8..65308cdca4c 100644
--- a/src/mesa/state_tracker/st_atom_image.c
+++ b/src/mesa/state_tracker/st_atom_image.c
@@ -180,7 +180,7 @@ void st_bind_vs_images(struct st_context *st)
    struct gl_program *prog =
       st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
 
-   st_bind_images(st, prog, PIPE_SHADER_VERTEX);
+   st_bind_images(st, prog, MESA_SHADER_VERTEX);
 }
 
 void st_bind_fs_images(struct st_context *st)
diff --git a/src/mesa/state_tracker/st_atom_sampler.c b/src/mesa/state_tracker/st_atom_sampler.c
index 5ac9962a5d0..32bb43c3c24 100644
--- a/src/mesa/state_tracker/st_atom_sampler.c
+++ b/src/mesa/state_tracker/st_atom_sampler.c
@@ -358,7 +358,7 @@ st_update_vertex_samplers(struct st_context *st)
    const struct gl_context *ctx = st->ctx;
 
    update_shader_samplers(st,
-                          PIPE_SHADER_VERTEX,
+                          MESA_SHADER_VERTEX,
                           ctx->VertexProgram._Current,
                           st->state.vert_samplers,
                           &st->state.num_vert_samplers);
diff --git a/src/mesa/state_tracker/st_atom_storagebuf.c b/src/mesa/state_tracker/st_atom_storagebuf.c
index 1ed4c3fd2c6..38d4b900662 100644
--- a/src/mesa/state_tracker/st_atom_storagebuf.c
+++ b/src/mesa/state_tracker/st_atom_storagebuf.c
@@ -96,7 +96,7 @@ void st_bind_vs_ssbos(struct st_context *st)
    struct gl_program *prog =
       st->ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
 
-   st_bind_ssbos(st, prog, PIPE_SHADER_VERTEX);
+   st_bind_ssbos(st, prog, MESA_SHADER_VERTEX);
 }
 
 void st_bind_fs_ssbos(struct st_context *st)
diff --git a/src/mesa/state_tracker/st_atom_texture.c b/src/mesa/state_tracker/st_atom_texture.c
index 27c9e6eb7f7..b0bb7306088 100644
--- a/src/mesa/state_tracker/st_atom_texture.c
+++ b/src/mesa/state_tracker/st_atom_texture.c
@@ -343,7 +343,7 @@ st_update_vertex_textures(struct st_context *st)
    const struct gl_context *ctx = st->ctx;
 
    if (ctx->Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits > 0) {
-      update_textures(st, PIPE_SHADER_VERTEX,
+      update_textures(st, MESA_SHADER_VERTEX,
                             ctx->VertexProgram._Current);
    }
 }
diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c
index 215d08d3753..d17efe26487 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -282,7 +282,7 @@ free_zombie_shaders(struct st_context *st)
       list_del(&entry->node);  // remove this entry from the list
 
       switch (entry->type) {
-      case PIPE_SHADER_VERTEX:
+      case MESA_SHADER_VERTEX:
          st->ctx->NewDriverState |= ST_NEW_VS_STATE;
          st->pipe->delete_vs_state(st->pipe, entry->shader);
          break;
diff --git a/src/mesa/state_tracker/st_draw_feedback.c b/src/mesa/state_tracker/st_draw_feedback.c
index 4c3142ba7bd..9aeb8fe353b 100644
--- a/src/mesa/state_tracker/st_draw_feedback.c
+++ b/src/mesa/state_tracker/st_draw_feedback.c
@@ -185,7 +185,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
       _mesa_load_state_parameters(st->ctx, params);
 
    draw_set_constant_buffer_stride(draw, sizeof(float));
-   draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0,
+   draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 0,
                                    params->ParameterValues,
                                    params->NumParameterValues * 4);
 
@@ -215,7 +215,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
       void *ptr = pipe_buffer_map_range(pipe, buf, offset, size,
                                         PIPE_MAP_READ, &ubo_transfer[i]);
 
-      draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 1 + i, ptr,
+      draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 1 + i, ptr,
                                       size);
    }
 
@@ -245,7 +245,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
       void *ptr = pipe_buffer_map_range(pipe, buf, offset, size,
                                         PIPE_MAP_READ, &ssbo_transfer[i]);
 
-      draw_set_mapped_shader_buffer(draw, PIPE_SHADER_VERTEX,
+      draw_set_mapped_shader_buffer(draw, MESA_SHADER_VERTEX,
                                     i, ptr, size);
    }
 
@@ -254,16 +254,16 @@ st_feedback_draw_vbo(struct gl_context *ctx,
    for (unsigned i = 0; i < st->state.num_vert_samplers; i++)
       samplers[i] = &st->state.vert_samplers[i];
 
-   draw_set_samplers(draw, PIPE_SHADER_VERTEX, samplers,
+   draw_set_samplers(draw, MESA_SHADER_VERTEX, samplers,
                      st->state.num_vert_samplers);
 
    /* sampler views */
    struct pipe_sampler_view *views[PIPE_MAX_SAMPLERS];
    unsigned extra_sampler_views = 0;
    unsigned num_views =
-      st_get_sampler_views(st, PIPE_SHADER_VERTEX, prog, views, &extra_sampler_views);
+      st_get_sampler_views(st, MESA_SHADER_VERTEX, prog, views, &extra_sampler_views);
 
-   draw_set_sampler_views(draw, PIPE_SHADER_VERTEX, views, num_views);
+   draw_set_sampler_views(draw, MESA_SHADER_VERTEX, views, num_views);
 
    struct pipe_transfer *sv_transfer[PIPE_MAX_SAMPLERS][PIPE_MAX_TEXTURE_LEVELS];
 
@@ -333,7 +333,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
                                            &sv_transfer[i][0]);
       }
 
-      draw_set_mapped_texture(draw, PIPE_SHADER_VERTEX, i, width0,
+      draw_set_mapped_texture(draw, MESA_SHADER_VERTEX, i, width0,
                               res->height0, num_layers, first_level,
                               last_level, 0, 0, (void*)base_addr, row_stride,
                               img_stride, mip_offset);
@@ -381,10 +381,10 @@ st_feedback_draw_vbo(struct gl_context *ctx,
                                       &img_transfer[i]);
       }
 
-      draw_set_mapped_image(draw, PIPE_SHADER_VERTEX, i, width, height,
+      draw_set_mapped_image(draw, MESA_SHADER_VERTEX, i, width, height,
                             num_layers, addr, row_stride, img_stride, 0, 0);
    }
-   draw_set_images(draw, PIPE_SHADER_VERTEX, images, prog->info.num_images);
+   draw_set_images(draw, MESA_SHADER_VERTEX, images, prog->info.num_images);
 
    /* draw here */
    for (i = 0; i < num_draws; i++) {
@@ -395,7 +395,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
    /* unmap images */
    for (unsigned i = 0; i < prog->info.num_images; i++) {
       if (img_transfer[i]) {
-         draw_set_mapped_image(draw, PIPE_SHADER_VERTEX, i, 0, 0, 0, NULL, 0, 0, 0, 0);
+         draw_set_mapped_image(draw, MESA_SHADER_VERTEX, i, 0, 0, 0, NULL, 0, 0, 0, 0);
          if (img_transfer[i]->resource->target == PIPE_BUFFER)
             pipe_buffer_unmap(pipe, img_transfer[i]);
          else
@@ -419,8 +419,8 @@ st_feedback_draw_vbo(struct gl_context *ctx,
       }
    }
 
-   draw_set_samplers(draw, PIPE_SHADER_VERTEX, NULL, 0);
-   draw_set_sampler_views(draw, PIPE_SHADER_VERTEX, NULL, 0);
+   draw_set_samplers(draw, MESA_SHADER_VERTEX, NULL, 0);
+   draw_set_sampler_views(draw, MESA_SHADER_VERTEX, NULL, 0);
 
    /* release YUV views back to driver */
    u_foreach_bit (i, extra_sampler_views) {
@@ -429,7 +429,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
 
    for (unsigned i = 0; i < prog->info.num_ssbos; i++) {
       if (ssbo_transfer[i]) {
-         draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 1 + i,
+         draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 1 + i,
                                          NULL, 0);
          pipe_buffer_unmap(pipe, ssbo_transfer[i]);
       }
@@ -437,7 +437,7 @@ st_feedback_draw_vbo(struct gl_context *ctx,
 
    for (unsigned i = 0; i < prog->info.num_ubos; i++) {
       if (ubo_transfer[i]) {
-         draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 1 + i,
+         draw_set_mapped_constant_buffer(draw, MESA_SHADER_VERTEX, 1 + i,
                                          NULL, 0);
          pipe_buffer_unmap(pipe, ubo_transfer[i]);
       }
diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index 31904e53b14..eab09b765fe 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -230,7 +230,7 @@ void st_init_limits(struct pipe_screen *screen,
          screen->shader_caps[sh].max_const_buffer0_size / 4;
 
       /* reserve space in the default-uniform for lowered state */
-      if (sh == PIPE_SHADER_VERTEX ||
+      if (sh == MESA_SHADER_VERTEX ||
           sh == PIPE_SHADER_TESS_EVAL ||
           sh == PIPE_SHADER_GEOMETRY) {
 
@@ -340,7 +340,7 @@ void st_init_limits(struct pipe_screen *screen,
          can_ubo = false;
       }
 
-      if (sh == PIPE_SHADER_VERTEX || sh == PIPE_SHADER_GEOMETRY) {
+      if (sh == MESA_SHADER_VERTEX || sh == PIPE_SHADER_GEOMETRY) {
          if (screen->caps.viewport_transform_lowered)
             options->LowerBuiltinVariablesXfb |= VARYING_BIT_POS;
          if (screen->caps.psiz_clamped)
@@ -1289,7 +1289,7 @@ void st_init_extensions(struct pipe_screen *screen,
       }
    } else {
       /* Optional integer support for GLSL 1.2. */
-      if (screen->shader_caps[PIPE_SHADER_VERTEX].integers &&
+      if (screen->shader_caps[MESA_SHADER_VERTEX].integers &&
           screen->shader_caps[PIPE_SHADER_FRAGMENT].integers) {
          consts->NativeIntegers = GL_TRUE;
 
@@ -1632,7 +1632,7 @@ void st_init_extensions(struct pipe_screen *screen,
        extensions->ARB_uniform_buffer_object &&
        (extensions->NV_primitive_restart ||
         consts->PrimitiveRestartFixedIndex) &&
-       screen->shader_caps[PIPE_SHADER_VERTEX].max_texture_samplers >= 16 &&
+       screen->shader_caps[MESA_SHADER_VERTEX].max_texture_samplers >= 16 &&
        /* Requirements for ETC2 emulation. */
        screen->is_format_supported(screen, PIPE_FORMAT_R8G8B8A8_UNORM,
                                    PIPE_TEXTURE_2D, 0, 0,