From cf4ab485ead01de2e448c163247a0fbbe10da6a8 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Mon, 20 Oct 2025 17:47:15 +0200 Subject: [PATCH] nir: remove manual nir_load_global_constant Acked-by: Alyssa Rosenzweig Part-of: --- src/compiler/nir/nir_builder.h | 15 --------------- .../nir/tests/minimize_call_live_states_test.cpp | 4 ++-- src/gallium/drivers/asahi/agx_nir_lower_sysvals.c | 9 +++++---- src/gallium/drivers/asahi/agx_state.c | 8 +++++--- src/gallium/drivers/iris/iris_program.c | 8 +++----- src/intel/compiler/brw/brw_nir.c | 6 ++---- src/intel/compiler/brw/brw_nir_rt.c | 5 +---- src/intel/compiler/brw/brw_nir_wa_18019110168.c | 5 ++--- src/intel/compiler/elk/elk_nir.c | 6 ++---- src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 10 ++++------ .../vulkan_hasvk/anv_nir_apply_pipeline_layout.c | 10 ++++------ src/kosmickrisp/vulkan/kk_nir_lower_vbo.c | 4 ++-- src/poly/nir/poly_nir_lower_gs.c | 6 +++--- src/poly/nir/poly_nir_lower_tess.c | 4 ++-- 14 files changed, 37 insertions(+), 63 deletions(-) diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index 0058fda90e8..01dcd39fc0e 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -2062,21 +2062,6 @@ nir_store_array_var_imm(nir_builder *build, nir_variable *var, int64_t index, nir_store_deref(build, deref, value, writemask); } -#undef nir_load_global_constant -static inline nir_def * -nir_load_global_constant(nir_builder *build, nir_def *addr, unsigned align, - unsigned num_components, unsigned bit_size) -{ - nir_intrinsic_instr *load = - nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_global_constant); - load->num_components = (uint8_t)num_components; - load->src[0] = nir_src_for_ssa(addr); - nir_intrinsic_set_align(load, align, 0); - nir_def_init(&load->instr, &load->def, num_components, bit_size); - nir_builder_instr_insert(build, &load->instr); - return &load->def; -} - #undef nir_load_param static inline nir_def * nir_load_param(nir_builder *build, uint32_t param_idx) diff --git a/src/compiler/nir/tests/minimize_call_live_states_test.cpp b/src/compiler/nir/tests/minimize_call_live_states_test.cpp index c141dcb9b5f..0489acd7bf0 100644 --- a/src/compiler/nir/tests/minimize_call_live_states_test.cpp +++ b/src/compiler/nir/tests/minimize_call_live_states_test.cpp @@ -63,7 +63,7 @@ TEST_F(nir_minimize_call_live_states_test, life_intrinsics) nir_def *v1 = nir_load_push_constant(b, 1, 64, nir_imm_int(b, 8)); nir_def *v2 = nir_load_global(b, 3, 32, v1); - nir_def *v3 = nir_load_global_constant(b, v1, 4, 1, 32); + nir_def *v3 = nir_load_global_constant(b, 1, 32, v1); nir_build_indirect_call(b, indirect_decl, callee, 0, NULL); @@ -228,7 +228,7 @@ TEST_F(nir_minimize_call_live_states_test, call_inside_loop) nir_def *index = nir_channel(b, nir_load_ray_launch_id(b), 0); addr = nir_iadd(b, addr, nir_u2u64(b, nir_imul_imm(b, index, 4))); - nir_def *callee = nir_load_global_constant(b, addr, 4, 1, 32); + nir_def *callee = nir_load_global_constant(b, 1, 32, addr); nir_def *value = nir_load_push_constant(b, 1, 32, nir_imm_int(b, 4)); nir_def *v1 = nir_iadd_imm(b, value, 1); diff --git a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c index c1ebac6c431..52b80dce990 100644 --- a/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c +++ b/src/gallium/drivers/asahi/agx_nir_lower_sysvals.c @@ -88,7 +88,7 @@ load_sysval_indirect(nir_builder *b, unsigned dim, unsigned bitsize, /* Index into the table and load */ nir_def *address = nir_iadd( b, array_base, nir_u2u64(b, nir_imul_imm(b, offset_el, stride))); - return nir_load_global_constant(b, address, bitsize / 8, dim, bitsize); + return nir_load_global_constant(b, dim, bitsize, address); } } @@ -111,8 +111,9 @@ load_ubo(nir_builder *b, nir_intrinsic_instr *intr, void *bases) nir_def *address = nir_iadd(b, base, nir_u2u64(b, intr->src[1].ssa)); - return nir_load_global_constant(b, address, nir_intrinsic_align(intr), - intr->num_components, intr->def.bit_size); + return nir_load_global_constant(b, intr->num_components, intr->def.bit_size, + address, + .align_mul = nir_intrinsic_align(intr)); } static nir_def * @@ -185,7 +186,7 @@ lower_intrinsic(nir_builder *b, nir_intrinsic_instr *intr, return load_sysval_root(b, 1, 64, &u->geometry_params); case nir_intrinsic_load_vs_output_buffer_poly: return nir_load_global_constant( - b, load_sysval_root(b, 1, 64, &u->vertex_output_buffer_ptr), 8, 1, 64); + b, 1, 64, load_sysval_root(b, 1, 64, &u->vertex_output_buffer_ptr)); case nir_intrinsic_load_vs_outputs_poly: return load_sysval_root(b, 1, 64, &u->vertex_outputs); case nir_intrinsic_load_tess_param_buffer_poly: diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index 438bf63d8fa..56fb8a968dd 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -2086,16 +2086,18 @@ lower_fs_prolog_abi(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *_) if (intr->intrinsic == nir_intrinsic_load_polygon_stipple_agx) { off_t stipple_offs = offsetof(struct agx_draw_uniforms, polygon_stipple); nir_def *stipple_ptr_ptr = nir_iadd_imm(b, root, stipple_offs); - nir_def *base = nir_load_global_constant(b, stipple_ptr_ptr, 4, 1, 64); + nir_def *base = + nir_load_global_constant(b, 1, 64, stipple_ptr_ptr, .align_mul = 4); nir_def *row = intr->src[0].ssa; nir_def *addr = nir_iadd(b, base, nir_u2u64(b, nir_imul_imm(b, row, 4))); - repl = nir_load_global_constant(b, addr, 4, 1, 32); + repl = nir_load_global_constant(b, 1, 32, addr); } else { off_t offs = offsetof(struct agx_draw_uniforms, pipeline_statistics[nir_intrinsic_base(intr)]); - repl = nir_load_global_constant(b, nir_iadd_imm(b, root, offs), 4, 1, 64); + repl = nir_load_global_constant(b, 1, 64, nir_iadd_imm(b, root, offs), + .align_mul = 4); } nir_def_replace(&intr->def, repl); diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index 135fadf7b09..014d28e16e8 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -990,7 +990,6 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, case nir_intrinsic_load_constant: { unsigned load_size = intrin->def.num_components * intrin->def.bit_size / 8; - unsigned load_align = intrin->def.bit_size / 8; /* This one is special because it reads from the shader constant * data and not cbuf0 which gallium uploads for us. @@ -1016,10 +1015,9 @@ iris_setup_uniforms(ASSERTED const struct intel_device_info *devinfo, nir_iadd(&b, nir_load_reloc_const_intel(&b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW), offset); nir_def *data = - nir_load_global_constant(&b, nir_u2u64(&b, const_data_addr), - load_align, - intrin->def.num_components, - intrin->def.bit_size); + nir_load_global_constant(&b, intrin->def.num_components, + intrin->def.bit_size, + nir_u2u64(&b, const_data_addr)); nir_def_rewrite_uses(&intrin->def, data); diff --git a/src/intel/compiler/brw/brw_nir.c b/src/intel/compiler/brw/brw_nir.c index 0916f6597d0..db16e8b7061 100644 --- a/src/intel/compiler/brw/brw_nir.c +++ b/src/intel/compiler/brw/brw_nir.c @@ -2804,7 +2804,6 @@ brw_nir_load_global_const(nir_builder *b, nir_intrinsic_instr *load, unsigned bit_size = load->def.bit_size; assert(bit_size >= 8 && bit_size % 8 == 0); - unsigned byte_size = bit_size / 8; nir_def *sysval; if (nir_src_is_const(load->src[0])) { @@ -2813,7 +2812,7 @@ brw_nir_load_global_const(nir_builder *b, nir_intrinsic_instr *load, nir_src_as_uint(load->src[0]); /* Things should be component-aligned. */ - assert(offset % byte_size == 0); + assert(offset % (bit_size / 8) == 0); unsigned suboffset = offset % 64; uint64_t aligned_offset = offset - suboffset; @@ -2836,8 +2835,7 @@ brw_nir_load_global_const(nir_builder *b, nir_intrinsic_instr *load, nir_iadd_imm(b, load->src[0].ssa, off + nir_intrinsic_base(load)); nir_def *addr = nir_iadd(b, base_addr, nir_u2u64(b, offset32)); - sysval = nir_load_global_constant(b, addr, byte_size, - load->num_components, bit_size); + sysval = nir_load_global_constant(b, load->num_components, bit_size, addr); } return sysval; diff --git a/src/intel/compiler/brw/brw_nir_rt.c b/src/intel/compiler/brw/brw_nir_rt.c index 1ad2c1569ab..76a7f1e5a1f 100644 --- a/src/intel/compiler/brw/brw_nir_rt.c +++ b/src/intel/compiler/brw/brw_nir_rt.c @@ -440,10 +440,7 @@ brw_nir_create_raygen_trampoline(const struct brw_compiler *compiler, nir_push_if(&b, is_indirect); { raygen_indirect_bsr_addr = - nir_load_global_constant(&b, raygen_param_bsr_addr, - 8 /* align */, - 1 /* components */, - 64 /* bit_size */); + nir_load_global_constant(&b, 1, 64, raygen_param_bsr_addr); } nir_pop_if(&b, NULL); diff --git a/src/intel/compiler/brw/brw_nir_wa_18019110168.c b/src/intel/compiler/brw/brw_nir_wa_18019110168.c index b50798de8e1..4408061e755 100644 --- a/src/intel/compiler/brw/brw_nir_wa_18019110168.c +++ b/src/intel/compiler/brw/brw_nir_wa_18019110168.c @@ -583,9 +583,8 @@ brw_nir_frag_convert_attrs_prim_to_vert_indirect(struct nir_shader *nir, * space in the instruction heap. */ nir_def *data = - nir_load_global_constant( - b, nir_iadd_imm(b, remap_table_addr, ROUND_DOWN_TO(location, 4)), - 4, 1, 32); + nir_load_global_constant(b, 1, 32, + nir_iadd_imm(b, remap_table_addr, ROUND_DOWN_TO(location, 4))); const unsigned bit_offset = (8 * location) % 32; nir_def *absolute_attr_idx = nir_ubitfield_extract_imm(b, data, bit_offset, 4); diff --git a/src/intel/compiler/elk/elk_nir.c b/src/intel/compiler/elk/elk_nir.c index bc88cea9b38..6f1f041997a 100644 --- a/src/intel/compiler/elk/elk_nir.c +++ b/src/intel/compiler/elk/elk_nir.c @@ -1948,7 +1948,6 @@ elk_nir_load_global_const(nir_builder *b, nir_intrinsic_instr *load_uniform, unsigned bit_size = load_uniform->def.bit_size; assert(bit_size >= 8 && bit_size % 8 == 0); - unsigned byte_size = bit_size / 8; nir_def *sysval; if (nir_src_is_const(load_uniform->src[0])) { @@ -1957,7 +1956,7 @@ elk_nir_load_global_const(nir_builder *b, nir_intrinsic_instr *load_uniform, nir_src_as_uint(load_uniform->src[0]); /* Things should be component-aligned. */ - assert(offset % byte_size == 0); + assert(offset % (bit_size / 8) == 0); unsigned suboffset = offset % 64; uint64_t aligned_offset = offset - suboffset; @@ -1976,8 +1975,7 @@ elk_nir_load_global_const(nir_builder *b, nir_intrinsic_instr *load_uniform, nir_iadd_imm(b, load_uniform->src[0].ssa, off + nir_intrinsic_base(load_uniform)); nir_def *addr = nir_iadd(b, base_addr, nir_u2u64(b, offset32)); - sysval = nir_load_global_constant(b, addr, byte_size, - load_uniform->num_components, bit_size); + sysval = nir_load_global_constant(b, load_uniform->num_components, bit_size, addr); } return sysval; diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index d749b8acc00..5f170535482 100644 --- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -1897,7 +1897,6 @@ lower_load_constant(nir_builder *b, nir_intrinsic_instr *intrin, unsigned load_size = intrin->def.num_components * intrin->def.bit_size / 8; - unsigned load_align = intrin->def.bit_size / 8; assert(load_size < b->shader->constant_data_size); unsigned max_offset = b->shader->constant_data_size - load_size; @@ -1910,10 +1909,9 @@ lower_load_constant(nir_builder *b, nir_intrinsic_instr *intrin, nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH)); nir_def *data = - nir_load_global_constant(b, const_data_addr, - load_align, - intrin->def.num_components, - intrin->def.bit_size); + nir_load_global_constant(b, intrin->def.num_components, + intrin->def.bit_size, + const_data_addr); nir_def_rewrite_uses(&intrin->def, data); @@ -2075,7 +2073,7 @@ lower_num_workgroups(nir_builder *b, nir_intrinsic_instr *intrin, nir_def *addr = nir_pack_64_2x32_split(b, nir_channel(b, num_workgroups, 1), nir_channel(b, num_workgroups, 2)); - num_workgroups_indirect = nir_load_global_constant(b, addr, 4, 3, 32); + num_workgroups_indirect = nir_load_global_constant(b, 3, 32, addr); } nir_pop_if(b, NULL); diff --git a/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c index 593a4dbc888..5f3a8ddaff7 100644 --- a/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan_hasvk/anv_nir_apply_pipeline_layout.c @@ -902,7 +902,6 @@ lower_load_constant(nir_builder *b, nir_intrinsic_instr *intrin, if (!anv_use_relocations(state->pdevice)) { unsigned load_size = intrin->def.num_components * intrin->def.bit_size / 8; - unsigned load_align = intrin->def.bit_size / 8; assert(load_size < b->shader->constant_data_size); unsigned max_offset = b->shader->constant_data_size - load_size; @@ -912,11 +911,10 @@ lower_load_constant(nir_builder *b, nir_intrinsic_instr *intrin, nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_LOW), nir_load_reloc_const_intel(b, INTEL_SHADER_RELOC_CONST_DATA_ADDR_HIGH)); - data = nir_load_global_constant(b, nir_iadd(b, const_data_base_addr, - nir_u2u64(b, offset)), - load_align, - intrin->def.num_components, - intrin->def.bit_size); + data = nir_load_global_constant(b, intrin->def.num_components, + intrin->def.bit_size, + nir_iadd(b, const_data_base_addr, + nir_u2u64(b, offset))); } else { nir_def *index = nir_imm_int(b, state->constants_offset); diff --git a/src/kosmickrisp/vulkan/kk_nir_lower_vbo.c b/src/kosmickrisp/vulkan/kk_nir_lower_vbo.c index 7dc3764a6b2..24c976b9a95 100644 --- a/src/kosmickrisp/vulkan/kk_nir_lower_vbo.c +++ b/src/kosmickrisp/vulkan/kk_nir_lower_vbo.c @@ -187,12 +187,12 @@ pass(struct nir_builder *b, nir_intrinsic_instr *intr, void *data) uint64_t attrib_base_offset = offsetof(struct kk_root_descriptor_table, draw.attrib_base[index]); nir_def *base = nir_load_global_constant( - b, nir_iadd_imm(b, argbuf, attrib_base_offset), 8, 1, 64); + b, 1, 64, nir_iadd_imm(b, argbuf, attrib_base_offset)); uint64_t buffer_stride_offset = offsetof( struct kk_root_descriptor_table, draw.buffer_strides[attrib.binding]); nir_def *stride = nir_load_global_constant( - b, nir_iadd_imm(b, argbuf, buffer_stride_offset), 4, 1, 32); + b, 1, 32, nir_iadd_imm(b, argbuf, buffer_stride_offset)); nir_def *stride_offset_el = nir_imul(b, el, nir_udiv_imm(b, stride, interchange_align)); diff --git a/src/poly/nir/poly_nir_lower_gs.c b/src/poly/nir/poly_nir_lower_gs.c index ff10f12644a..4a978420c2d 100644 --- a/src/poly/nir/poly_nir_lower_gs.c +++ b/src/poly/nir/poly_nir_lower_gs.c @@ -179,7 +179,7 @@ load_geometry_param_offset(nir_builder *b, uint32_t offset, uint8_t bytes) assert((offset % bytes) == 0 && "must be naturally aligned"); - return nir_load_global_constant(b, addr, bytes, 1, bytes * 8); + return nir_load_global_constant(b, 1, bytes * 8, addr); } #define load_geometry_param(b, field) \ @@ -299,8 +299,8 @@ poly_load_per_vertex_input(nir_builder *b, nir_intrinsic_instr *intr, } addr = nir_iadd_imm(b, addr, 4 * nir_intrinsic_component(intr)); - return nir_load_global_constant(b, addr, 4, intr->def.num_components, - intr->def.bit_size); + return nir_load_global_constant(b, intr->def.num_components, + intr->def.bit_size, addr, .align_mul = 4); } static bool diff --git a/src/poly/nir/poly_nir_lower_tess.c b/src/poly/nir/poly_nir_lower_tess.c index 769b4170666..3fceb1a0926 100644 --- a/src/poly/nir/poly_nir_lower_tess.c +++ b/src/poly/nir/poly_nir_lower_tess.c @@ -75,8 +75,8 @@ lower_tes_load(nir_builder *b, nir_intrinsic_instr *intr) if (nir_intrinsic_has_component(intr)) addr = nir_iadd_imm(b, addr, nir_intrinsic_component(intr) * 4); - return nir_load_global_constant(b, addr, 4, intr->def.num_components, - intr->def.bit_size); + return nir_load_global_constant(b, intr->def.num_components, + intr->def.bit_size, addr, .align_mul = 4); } static nir_def *