fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-08 04:10:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radv: fix GPU hangs with image copies for ASTC/ETC2 formats on transfer queue

Browse source 
Emitting compute dispatches on SDMA just hangs. It might be needed
to switch to gang submit for these to work but fixing the GPU hang is
more important for now.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34805>
(cherry picked from commit 0684dc5fa8)
This commit is contained in:
Samuel Pitoiset 2025-05-05 09:09:27 +02:00 • committed by Eric Engestrom
parent 231a808f8c
commit cedd447a92
2 changed files with 3 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -4814,7 +4814,7 @@
"description": "radv: fix GPU hangs with image copies for ASTC/ETC2 formats on transfer queue",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

4
src/amd/vulkan/meta/radv_meta_copy.c
View file

@ -231,7 +231,7 @@ radv_CmdCopyBufferToImage2(VkCommandBuffer commandBuffer, const VkCopyBufferToIm
&pCopyBufferToImageInfo->pRegions[r]);
}
if (radv_is_format_emulated(pdev, dst_image->vk.format)) {
if (radv_is_format_emulated(pdev, dst_image->vk.format) && cmd_buffer->qf != RADV_QUEUE_TRANSFER) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
radv_src_access_flush(cmd_buffer, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
VK_ACCESS_TRANSFER_WRITE_BIT, 0, dst_image, NULL) |
@ -643,7 +643,7 @@ radv_CmdCopyImage2(VkCommandBuffer commandBuffer, const VkCopyImageInfo2 *pCopyI
&pCopyImageInfo->pRegions[r]);
}
if (radv_is_format_emulated(pdev, dst_image->vk.format)) {
if (radv_is_format_emulated(pdev, dst_image->vk.format) && cmd_buffer->qf != RADV_QUEUE_TRANSFER) {
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
radv_src_access_flush(cmd_buffer, VK_PIPELINE_STAGE_2_ALL_COMMANDS_BIT,
VK_ACCESS_TRANSFER_WRITE_BIT, 0, dst_image, NULL) |