From ce6a1e756379bd1bddb838584e162d957c72d855 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Wed, 7 May 2025 17:28:19 +0800 Subject: [PATCH] radeonsi: init mesh shader args MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_shader.h | 3 ++ src/gallium/drivers/radeonsi/si_shader_args.c | 51 +++++++++++++++++++ .../drivers/radeonsi/si_shader_internal.h | 3 ++ 3 files changed, 57 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index 6f5f5070a9a..466beb62f68 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -190,6 +190,9 @@ enum SI_SGPR_ALPHA_REF, SI_PS_NUM_USER_SGPR, + /* MS only */ + GFX11_SGPR_MS_ATTRIBUTE_RING_ADDR = SI_NUM_RESOURCE_SGPRS, + /* The value has to be 12, because the hw requires that descriptors * are aligned to 4 SGPRs. */ diff --git a/src/gallium/drivers/radeonsi/si_shader_args.c b/src/gallium/drivers/radeonsi/si_shader_args.c index 76245764c7a..d0a3e49fc3a 100644 --- a/src/gallium/drivers/radeonsi/si_shader_args.c +++ b/src/gallium/drivers/radeonsi/si_shader_args.c @@ -579,6 +579,57 @@ void si_init_shader_args(struct si_shader *shader, struct si_shader_args *args, ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_VALUE, &args->ac.local_invocation_id_z); } break; + case MESA_SHADER_MESH: + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, NULL); /* unused */ + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, NULL); /* unused */ + + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.gs_tg_info); + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.merged_wave_info); + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.tess_offchip_offset); + + if (sel->screen->info.gfx_level >= GFX11) + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.gs_attr_offset); + else + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.scratch_offset); + + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, NULL); /* unused */ + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, NULL); /* unused */ + + /* User SGPRs */ + declare_global_desc_pointers(args); + declare_per_stage_desc_pointers(args, shader, info, true); + + if (sel->screen->info.gfx_level >= GFX11) + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->gs_attr_address); + + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.task_ring_entry); + + if (info->task_payload_size) + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->task_ring_addr); + + if (shader->info.uses_draw_id) + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->ac.draw_id); + + if (sel->info.uses_grid_size) + ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_VALUE, &args->ac.num_work_groups); + else if (sel->screen->info.gfx_level < GFX11) + /* GFX10 always write grid size to SGPR, reserve space for it */ + ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_VALUE, NULL); + + /* We don't know at this point whether this arg is needed until ac_lower_ngg_mesh, + * so add this arg at last to not affect other args. + */ + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_VALUE, &args->mesh_scratch_ring_addr); + + /* VGPRs */ + if (sel->screen->info.mesh_fast_launch_2) { + ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_VALUE, &args->ac.local_invocation_ids_packed); + } else { + unsigned unused_args = sel->screen->info.gfx_level >= GFX12 ? 3 : 5; + ac_add_arg(&args->ac, AC_ARG_VGPR, unused_args, AC_ARG_VALUE, NULL); + ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_VALUE, &args->ac.vertex_id); + } + break; default: assert(0 && "unimplemented shader"); return; diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h index 056c0d32678..eed9034f35d 100644 --- a/src/gallium/drivers/radeonsi/si_shader_internal.h +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h @@ -57,6 +57,9 @@ struct si_shader_args { struct ac_arg cs_user_data[2]; struct ac_arg cs_shaderbuf[3]; struct ac_arg cs_image[3]; + /* TS and MS */ + struct ac_arg task_ring_addr; + struct ac_arg mesh_scratch_ring_addr; }; struct si_nir_shader_ctx {