intel/genxml: introduce L3 Fabric Flush for gfx12

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
(cherry picked from commit 8cb08830e6)

.pick_status.json

@@ -54,7 +54,7 @@
         "description": "intel/genxml: introduce L3 Fabric Flush for gfx12",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null,
         "notes": null

src/intel/genxml/gen12.xml

@@ -1320,6 +1320,7 @@
     <field name="Protected Memory Disable" start="59" end="59" type="bool" />
     <field name="Tile Cache Flush Enable" start="60" end="60" type="bool" />
     <field name="Command Cache Invalidate Enable" start="61" end="61" type="bool" />
+    <field name="L3 Fabric Flush" start="62" end="62" type="bool" />
     <field name="Address" start="66" end="111" type="address" />
     <field name="Immediate Data" start="128" end="191" type="uint" />
   </instruction>

src/intel/genxml/gen125.xml

@@ -1826,6 +1826,7 @@
     <field name="Protected Memory Disable" start="59" end="59" type="bool" />
     <field name="Tile Cache Flush Enable" start="60" end="60" type="bool" />
     <field name="Command Cache Invalidate Enable" start="61" end="61" type="bool" />
+    <field name="L3 Fabric Flush" start="62" end="62" type="bool" />
     <field name="TBIMR Force Batch Closure" start="63" end="63" type="uint">
       <value name="No Batch Closure" value="0" />
       <value name="Close Batch" value="1" />