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swr: [rasterizer fetch] Add support for fetching non-uniform component formats
For example, R10G10B10A2_UNORM. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
This commit is contained in:
Tim Rowley
parent
244ae7af1b
commit
cd21f90ecf
1 changed files with 189 additions and 1 deletions
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@ -76,6 +76,13 @@ struct FetchJit : public Builder
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void JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* fetchInfo, Value* streams, Value* vIndices, Value* pVtxOut);
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void JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* fetchInfo, Value* streams, Value* vIndices, Value* pVtxOut);
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bool IsOddFormat(SWR_FORMAT format);
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bool IsUniformFormat(SWR_FORMAT format);
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void UnpackComponents(SWR_FORMAT format, Value* vInput, Value* result[4]);
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void CreateGatherOddFormats(SWR_FORMAT format, Value* pBase, Value* offsets, Value* result[4]);
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void ConvertFormat(SWR_FORMAT format, Value *texels[4]);
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};
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Function* FetchJit::Create(const FETCH_COMPILE_STATE& fetchState)
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@ -466,6 +473,169 @@ void FetchJit::JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* fet
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}
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}
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// returns true for odd formats that require special state.gather handling
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bool FetchJit::IsOddFormat(SWR_FORMAT format)
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{
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const SWR_FORMAT_INFO& info = GetFormatInfo(format);
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if (info.bpc[0] != 8 && info.bpc[0] != 16 && info.bpc[0] != 32)
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{
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return true;
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}
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return false;
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}
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// format is uniform if all components are the same size and type
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bool FetchJit::IsUniformFormat(SWR_FORMAT format)
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{
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const SWR_FORMAT_INFO& info = GetFormatInfo(format);
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uint32_t bpc0 = info.bpc[0];
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uint32_t type0 = info.type[0];
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for (uint32_t c = 1; c < info.numComps; ++c)
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{
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if (bpc0 != info.bpc[c] || type0 != info.type[c])
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{
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return false;
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}
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}
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return true;
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}
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// unpacks components based on format
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// foreach component in the pixel
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// mask off everything but this component
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// shift component to LSB
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void FetchJit::UnpackComponents(SWR_FORMAT format, Value* vInput, Value* result[4])
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{
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const SWR_FORMAT_INFO& info = GetFormatInfo(format);
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uint32_t bitOffset = 0;
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for (uint32_t c = 0; c < info.numComps; ++c)
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{
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uint32_t swizzledIndex = info.swizzle[c];
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uint32_t compBits = info.bpc[c];
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uint32_t bitmask = ((1 << compBits) - 1) << bitOffset;
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Value* comp = AND(vInput, bitmask);
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comp = LSHR(comp, bitOffset);
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result[swizzledIndex] = comp;
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bitOffset += compBits;
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}
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}
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// gather for odd component size formats
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// gather SIMD full pixels per lane then shift/mask to move each component to their
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// own vector
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void FetchJit::CreateGatherOddFormats(SWR_FORMAT format, Value* pBase, Value* offsets, Value* result[4])
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{
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const SWR_FORMAT_INFO &info = GetFormatInfo(format);
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// only works if pixel size is <= 32bits
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SWR_ASSERT(info.bpp <= 32);
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uint32_t numComps = info.numComps;
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Value* gather = VUNDEF_I();
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// assign defaults
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for (uint32_t comp = 0; comp < 4; ++comp)
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{
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result[comp] = VIMMED1((int)info.defaults[comp]);
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}
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// gather SIMD pixels
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for (uint32_t e = 0; e < JM()->mVWidth; ++e)
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{
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Value* elemOffset = VEXTRACT(offsets, C(e));
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Value* load = GEP(pBase, elemOffset);
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// load the proper amount of data based on component size
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switch (info.bpp)
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{
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case 8: load = POINTER_CAST(load, Type::getInt8PtrTy(JM()->mContext)); break;
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case 16: load = POINTER_CAST(load, Type::getInt16PtrTy(JM()->mContext)); break;
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case 32: load = POINTER_CAST(load, Type::getInt32PtrTy(JM()->mContext)); break;
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default: SWR_ASSERT(0);
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}
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// load pixel
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Value *val = LOAD(load);
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// zero extend to 32bit integer
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val = INT_CAST(val, mInt32Ty, false);
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// store in simd lane
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gather = VINSERT(gather, val, C(e));
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}
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UnpackComponents(format, gather, result);
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// cast to fp32
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result[0] = BITCAST(result[0], mSimdFP32Ty);
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result[1] = BITCAST(result[1], mSimdFP32Ty);
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result[2] = BITCAST(result[2], mSimdFP32Ty);
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result[3] = BITCAST(result[3], mSimdFP32Ty);
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}
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void FetchJit::ConvertFormat(SWR_FORMAT format, Value *texels[4])
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{
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const SWR_FORMAT_INFO &info = GetFormatInfo(format);
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for (uint32_t c = 0; c < info.numComps; ++c)
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{
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uint32_t compIndex = info.swizzle[c];
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// skip any conversion on UNUSED components
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if (info.type[c] == SWR_TYPE_UNUSED)
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{
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continue;
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}
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if (info.isNormalized[c])
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{
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if (info.type[c] == SWR_TYPE_SNORM)
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{
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/// @todo The most-negative value maps to -1.0f. e.g. the 5-bit value 10000 maps to -1.0f.
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/// result = c * (1.0f / (2^(n-1) - 1);
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uint32_t n = info.bpc[c];
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uint32_t pow2 = 1 << (n - 1);
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float scale = 1.0f / (float)(pow2 - 1);
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Value *vScale = VIMMED1(scale);
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texels[compIndex] = BITCAST(texels[compIndex], mSimdInt32Ty);
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texels[compIndex] = SI_TO_FP(texels[compIndex], mSimdFP32Ty);
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texels[compIndex] = FMUL(texels[compIndex], vScale);
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}
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else
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{
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SWR_ASSERT(info.type[c] == SWR_TYPE_UNORM);
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/// result = c * (1.0f / (2^n - 1))
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uint32_t n = info.bpc[c];
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uint32_t pow2 = 1 << n;
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// special case 24bit unorm format, which requires a full divide to meet ULP requirement
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if (n == 24)
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{
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float scale = (float)(pow2 - 1);
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Value* vScale = VIMMED1(scale);
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texels[compIndex] = BITCAST(texels[compIndex], mSimdInt32Ty);
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texels[compIndex] = SI_TO_FP(texels[compIndex], mSimdFP32Ty);
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texels[compIndex] = FDIV(texels[compIndex], vScale);
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}
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else
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{
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float scale = 1.0f / (float)(pow2 - 1);
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Value *vScale = VIMMED1(scale);
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texels[compIndex] = BITCAST(texels[compIndex], mSimdInt32Ty);
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texels[compIndex] = UI_TO_FP(texels[compIndex], mSimdFP32Ty);
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texels[compIndex] = FMUL(texels[compIndex], vScale);
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}
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}
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continue;
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}
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}
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}
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//////////////////////////////////////////////////////////////////////////
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/// @brief Loads attributes from memory using AVX2 GATHER(s)
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/// @param fetchState - info about attributes to be fetched from memory
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@ -575,11 +745,26 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* f
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const ComponentControl compCtrl[4] { (ComponentControl)ied.ComponentControl0, (ComponentControl)ied.ComponentControl1,
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(ComponentControl)ied.ComponentControl2, (ComponentControl)ied.ComponentControl3};
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if(info.type[0] == SWR_TYPE_FLOAT)
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// Special gather/conversion for formats without equal component sizes
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if (IsOddFormat((SWR_FORMAT)ied.Format))
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{
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// Only full 4 component fetch is supported for odd formats
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SWR_ASSERT(compMask == XYZW);
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Value* pResults[4];
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CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase, vOffsets, pResults);
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ConvertFormat((SWR_FORMAT)ied.Format, pResults);
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StoreVertexElements(pVtxOut, outputElt++, 4, pResults);
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currentVertexElement = 0;
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}
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else if(info.type[0] == SWR_TYPE_FLOAT)
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{
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///@todo: support 64 bit vb accesses
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Value* gatherSrc = VIMMED1(0.0f);
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SWR_ASSERT(IsUniformFormat((SWR_FORMAT)ied.Format),
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"Unsupported format for standard gather fetch.");
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// Gather components from memory to store in a simdvertex structure
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switch(bpc)
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{
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@ -665,6 +850,9 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* f
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Instruction::CastOps extendCastType = Instruction::CastOps::CastOpsEnd;
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ConversionType conversionType = CONVERT_NONE;
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SWR_ASSERT(IsUniformFormat((SWR_FORMAT)ied.Format),
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"Unsupported format for standard gather fetch.");
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switch(info.type[0])
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{
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case SWR_TYPE_UNORM:
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