From ccd18ec4f34b6f1407fb7c1671de8c789f33fa1f Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Wed, 15 Jun 2022 09:21:10 -0700 Subject: [PATCH] nir: i32csel opcodes should compare with integer zero Reviewed-by: Kenneth Graunke Reviewed-by: Alyssa Rosenzweig Reviewed-by: Jason Ekstrand Noticed-by: Georg Lehmann Fixes: 0f5b3c37c5d ("nir: Add opcodes for fused comp + csel and optimizations") Part-of: --- src/compiler/nir/nir_opcodes.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py index a9fee18c361..dd8959e9523 100644 --- a/src/compiler/nir/nir_opcodes.py +++ b/src/compiler/nir/nir_opcodes.py @@ -1019,8 +1019,8 @@ opcode("b16csel", 0, tuint, [0, 0, 0], opcode("b32csel", 0, tuint, [0, 0, 0], [tbool32, tuint, tuint], False, "", "src0 ? src1 : src2") -triop("i32csel_gt", tint32, "", "(src0 > 0.0f) ? src1 : src2") -triop("i32csel_ge", tint32, "", "(src0 >= 0.0f) ? src1 : src2") +triop("i32csel_gt", tint32, "", "(src0 > 0) ? src1 : src2") +triop("i32csel_ge", tint32, "", "(src0 >= 0) ? src1 : src2") triop("fcsel_gt", tfloat32, "", "(src0 > 0.0f) ? src1 : src2") triop("fcsel_ge", tfloat32, "", "(src0 >= 0.0f) ? src1 : src2")