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anv: Stop merging DEPTH_STENCIL state
Now that we've stopped trying to do dynamic stuff up-front, we're only merging in one bit: DoubleSidedStencilEnable. There's no point in all the merging code for one bit which is a constant anyway. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564>
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4 changed files with 48 additions and 88 deletions
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@ -3368,7 +3368,6 @@ struct anv_graphics_pipeline {
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*/
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struct {
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uint32_t sf[7];
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uint32_t depth_stencil_state[3];
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uint32_t clip[4];
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uint32_t xfb_bo_pitch[4];
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uint32_t wm[3];
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@ -3379,16 +3378,11 @@ struct anv_graphics_pipeline {
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struct {
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uint32_t sf[4];
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uint32_t raster[5];
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uint32_t wm_depth_stencil[3];
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uint32_t wm[2];
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uint32_t ps_blend[2];
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uint32_t blend_state[1 + MAX_RTS * 2];
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uint32_t streamout_state[5];
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} gfx8;
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struct {
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uint32_t wm_depth_stencil[4];
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} gfx9;
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};
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struct anv_compute_pipeline {
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@ -979,14 +979,6 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
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const struct vk_depth_stencil_state *ds_in,
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const struct vk_render_pass_state *rp)
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{
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#if GFX_VER == 7
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# define depth_stencil_dw pipeline->gfx7.depth_stencil_state
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#elif GFX_VER == 8
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# define depth_stencil_dw pipeline->gfx8.wm_depth_stencil
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#else
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# define depth_stencil_dw pipeline->gfx9.wm_depth_stencil
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#endif
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if (ds_in == NULL) {
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/* We're going to OR this together with the dynamic state. We need
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* to make sure it's initialized to something useful.
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@ -996,7 +988,6 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
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pipeline->writes_depth = false;
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pipeline->depth_test_enable = false;
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pipeline->depth_bounds_test_enable = false;
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memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw));
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return;
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}
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@ -1015,20 +1006,6 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
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pipeline->writes_depth = ds.depth.write_enable;
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pipeline->depth_test_enable = ds.depth.test_enable;
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pipeline->depth_bounds_test_enable = ds.depth.bounds_test.enable;
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#if GFX_VER <= 7
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struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
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#else
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struct GENX(3DSTATE_WM_DEPTH_STENCIL) depth_stencil = {
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#endif
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.DoubleSidedStencilEnable = true,
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};
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#if GFX_VER <= 7
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GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil);
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#else
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GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, depth_stencil_dw, &depth_stencil);
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#endif
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}
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static bool
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@ -143,6 +143,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
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uint32_t depth_stencil_dw[GENX(DEPTH_STENCIL_STATE_length)];
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struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
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.DoubleSidedStencilEnable = true,
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.StencilTestMask = d->stencil_compare_mask.front & 0xff,
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.StencilWriteMask = d->stencil_write_mask.front & 0xff,
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@ -169,9 +171,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
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GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil);
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struct anv_state ds_state =
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anv_cmd_buffer_merge_dynamic(cmd_buffer, depth_stencil_dw,
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pipeline->gfx7.depth_stencil_state,
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GENX(DEPTH_STENCIL_STATE_length), 64);
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anv_cmd_buffer_emit_dynamic(cmd_buffer, depth_stencil_dw,
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sizeof(depth_stencil_dw), 64);
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anv_batch_emit(&cmd_buffer->batch,
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GENX(3DSTATE_DEPTH_STENCIL_STATE_POINTERS), dsp) {
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@ -430,39 +430,32 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
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ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
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ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE |
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ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) {
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uint32_t wm_depth_stencil_dw[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
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anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_DEPTH_STENCIL), ds) {
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ds.DoubleSidedStencilEnable = true;
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struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil) = {
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GENX(3DSTATE_WM_DEPTH_STENCIL_header),
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ds.StencilTestMask = d->stencil_compare_mask.front & 0xff;
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ds.StencilWriteMask = d->stencil_write_mask.front & 0xff;
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.StencilTestMask = d->stencil_compare_mask.front & 0xff,
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.StencilWriteMask = d->stencil_write_mask.front & 0xff,
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ds.BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff;
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ds.BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff;
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.BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff,
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.BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff,
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.StencilBufferWriteEnable =
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ds.StencilBufferWriteEnable =
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(d->stencil_write_mask.front || d->stencil_write_mask.back) &&
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d->stencil_test_enable,
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d->stencil_test_enable;
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.DepthTestEnable = d->depth_test_enable,
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.DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable,
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.DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op],
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.StencilTestEnable = d->stencil_test_enable,
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.StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op],
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.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op],
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.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op],
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.StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op],
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.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op],
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.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op],
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.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op],
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.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op],
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};
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GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, wm_depth_stencil_dw,
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&wm_depth_stencil);
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anv_batch_emit_merge(&cmd_buffer->batch, wm_depth_stencil_dw,
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pipeline->gfx8.wm_depth_stencil);
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ds.DepthTestEnable = d->depth_test_enable;
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ds.DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable;
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ds.DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op];
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ds.StencilTestEnable = d->stencil_test_enable;
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ds.StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op];
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ds.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op];
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ds.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op];
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ds.StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op];
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ds.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op];
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ds.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op];
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ds.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op];
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ds.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op];
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}
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genX(cmd_buffer_enable_pma_fix)(cmd_buffer,
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want_depth_pma_fix(cmd_buffer));
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@ -497,41 +490,36 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
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ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
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ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE |
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ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) {
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uint32_t dwords[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
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struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = {
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GENX(3DSTATE_WM_DEPTH_STENCIL_header),
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anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_DEPTH_STENCIL), ds) {
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ds.DoubleSidedStencilEnable = true;
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.StencilTestMask = d->stencil_compare_mask.front & 0xff,
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.StencilWriteMask = d->stencil_write_mask.front & 0xff,
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ds.StencilTestMask = d->stencil_compare_mask.front & 0xff;
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ds.StencilWriteMask = d->stencil_write_mask.front & 0xff;
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.BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff,
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.BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff,
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ds.BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff;
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ds.BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff;
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.StencilReferenceValue = d->stencil_reference.front & 0xff,
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.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
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ds.StencilReferenceValue = d->stencil_reference.front & 0xff;
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ds.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff;
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.StencilBufferWriteEnable =
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ds.StencilBufferWriteEnable =
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(d->stencil_write_mask.front || d->stencil_write_mask.back) &&
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d->stencil_test_enable,
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d->stencil_test_enable;
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.DepthTestEnable = d->depth_test_enable,
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.DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable,
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.DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op],
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.StencilTestEnable = d->stencil_test_enable,
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.StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op],
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.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op],
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.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op],
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.StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op],
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.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op],
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.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op],
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.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op],
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.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op],
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ds.DepthTestEnable = d->depth_test_enable;
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ds.DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable;
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ds.DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op];
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ds.StencilTestEnable = d->stencil_test_enable;
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ds.StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op];
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ds.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op];
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ds.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op];
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ds.StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op];
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ds.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op];
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ds.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op];
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ds.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op];
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ds.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op];
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};
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GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dwords, &wm_depth_stencil);
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anv_batch_emit_merge(&cmd_buffer->batch, dwords,
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pipeline->gfx9.wm_depth_stencil);
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}
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genX(cmd_buffer_enable_pma_fix)(cmd_buffer,
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want_stencil_pma_fix(cmd_buffer));
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