diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 344ed8f2036..992bbf4d12b 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -687,6 +687,8 @@ iris_hiz_exec(struct iris_context *ice,
name = "depth clear";
break;
case ISL_AUX_OP_PARTIAL_RESOLVE:
+ name = "depth partial resolve";
+ break;
case ISL_AUX_OP_NONE:
UNREACHABLE("Invalid HiZ op");
}
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 1f3ee2ef567..05b12a0204d 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -40,6 +40,7 @@ blorp_op_to_intel_measure_snapshot(enum blorp_op op)
MAP(HIZ_AMBIGUATE),
MAP(HIZ_CLEAR),
MAP(HIZ_RESOLVE),
+ MAP(HIZ_PARTIAL_RESOLVE),
MAP(MCS_AMBIGUATE),
MAP(MCS_COLOR_CLEAR),
MAP(MCS_PARTIAL_RESOLVE),
@@ -65,6 +66,7 @@ const char *blorp_op_to_name(enum blorp_op op)
MAP(HIZ_AMBIGUATE),
MAP(HIZ_CLEAR),
MAP(HIZ_RESOLVE),
+ MAP(HIZ_PARTIAL_RESOLVE),
MAP(MCS_AMBIGUATE),
MAP(MCS_COLOR_CLEAR),
MAP(MCS_PARTIAL_RESOLVE),
@@ -267,13 +269,15 @@ blorp_hiz_op(struct blorp_batch *batch, struct blorp_surf *surf,
case ISL_AUX_OP_FULL_RESOLVE:
params.op = BLORP_OP_HIZ_RESOLVE;
break;
+ case ISL_AUX_OP_PARTIAL_RESOLVE:
+ params.op = BLORP_OP_HIZ_PARTIAL_RESOLVE;
+ break;
case ISL_AUX_OP_AMBIGUATE:
params.op = BLORP_OP_HIZ_AMBIGUATE;
break;
case ISL_AUX_OP_FAST_CLEAR:
params.op = BLORP_OP_HIZ_CLEAR;
break;
- case ISL_AUX_OP_PARTIAL_RESOLVE:
case ISL_AUX_OP_NONE:
UNREACHABLE("Invalid HiZ op");
}
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 33f75835e71..613dde5553e 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -48,6 +48,7 @@ enum blorp_op {
BLORP_OP_HIZ_AMBIGUATE,
BLORP_OP_HIZ_CLEAR,
BLORP_OP_HIZ_RESOLVE,
+ BLORP_OP_HIZ_PARTIAL_RESOLVE,
BLORP_OP_MCS_AMBIGUATE,
BLORP_OP_MCS_COLOR_CLEAR,
BLORP_OP_MCS_PARTIAL_RESOLVE,
diff --git a/src/intel/blorp/blorp_genX_exec_brw.h b/src/intel/blorp/blorp_genX_exec_brw.h
index fc18caae7ce..85135a4f55d 100644
--- a/src/intel/blorp/blorp_genX_exec_brw.h
+++ b/src/intel/blorp/blorp_genX_exec_brw.h
@@ -1553,11 +1553,21 @@ blorp_emit_gfx8_hiz_op(struct blorp_batch *batch,
assert(params->full_surface_hiz_op);
hzp.DepthBufferResolveEnable = true;
break;
+ case ISL_AUX_OP_PARTIAL_RESOLVE:
+#if GFX_VERx10 >= 125
+ hzp.DepthBufferPartialResolveEnable = true;
+#else
+ /* ISL's state machine may suggest a partial resolve
+ * regardless of the graphics version. Emit a full resolve on
+ * platforms which don't support it.
+ */
+ hzp.DepthBufferResolveEnable = true;
+#endif
+ break;
case ISL_AUX_OP_AMBIGUATE:
assert(params->full_surface_hiz_op);
hzp.HierarchicalDepthBufferResolveEnable = true;
break;
- case ISL_AUX_OP_PARTIAL_RESOLVE:
case ISL_AUX_OP_NONE:
UNREACHABLE("Invalid HIZ op");
}
diff --git a/src/intel/genxml/gen125.xml b/src/intel/genxml/gen125.xml
index 3a5fadb626c..2bc5bd3cb6c 100644
--- a/src/intel/genxml/gen125.xml
+++ b/src/intel/genxml/gen125.xml
@@ -1579,6 +1579,7 @@
+
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index d11c519554f..9decbfd9a3e 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -509,6 +509,7 @@ get_color_aux_op(const struct blorp_params *params)
case BLORP_OP_HIZ_AMBIGUATE:
case BLORP_OP_HIZ_CLEAR:
case BLORP_OP_HIZ_RESOLVE:
+ case BLORP_OP_HIZ_PARTIAL_RESOLVE:
case BLORP_OP_SLOW_DEPTH_CLEAR:
assert(params->fast_clear_op == ISL_AUX_OP_NONE);
return ISL_AUX_OP_NONE;