From cb845c53f4031f2331db96d192f9299590726bb5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 17 Aug 2021 18:50:15 -0400 Subject: [PATCH] radeonsi: enable DCC stores for clear_render_target on gfx10 Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_clear.c | 3 ++- src/gallium/drivers/radeonsi/si_compute_blit.c | 5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index 48283c0340e..b8cf49a6b47 100644 --- a/src/gallium/drivers/radeonsi/si_clear.c +++ b/src/gallium/drivers/radeonsi/si_clear.c @@ -1074,7 +1074,8 @@ static void si_clear_render_target(struct pipe_context *ctx, struct pipe_surface struct si_context *sctx = (struct si_context *)ctx; struct si_texture *sdst = (struct si_texture *)dst->texture; - if (dst->texture->nr_samples <= 1 && !vi_dcc_enabled(sdst, dst->u.tex.level)) { + if (dst->texture->nr_samples <= 1 && + (sctx->chip_class >= GFX10 || !vi_dcc_enabled(sdst, dst->u.tex.level))) { si_compute_clear_render_target(ctx, dst, color, dstx, dsty, width, height, render_condition_enabled); return; diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index fa0392e0214..bf2f2da20ec 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -773,6 +773,7 @@ void si_compute_clear_render_target(struct pipe_context *ctx, struct pipe_surfac bool render_condition_enabled) { struct si_context *sctx = (struct si_context *)ctx; + struct si_texture *tex = (struct si_texture*)dstsurf->texture; unsigned num_layers = dstsurf->u.tex.last_layer - dstsurf->u.tex.first_layer + 1; unsigned data[4 + sizeof(color->ui)] = {dstx, dsty, dstsurf->u.tex.first_layer, 0}; @@ -794,7 +795,7 @@ void si_compute_clear_render_target(struct pipe_context *ctx, struct pipe_surfac } si_make_CB_shader_coherent(sctx, dstsurf->texture->nr_samples, true, - true /* DCC is not possible with image stores */); + tex->surface.u.gfx9.color.dcc.pipe_aligned); struct pipe_constant_buffer saved_cb = {}; si_get_pipe_constant_buffer(sctx, PIPE_SHADER_COMPUTE, 0, &saved_cb); @@ -810,7 +811,7 @@ void si_compute_clear_render_target(struct pipe_context *ctx, struct pipe_surfac struct pipe_image_view image = {0}; image.resource = dstsurf->texture; - image.shader_access = image.access = PIPE_IMAGE_ACCESS_WRITE; + image.shader_access = image.access = PIPE_IMAGE_ACCESS_WRITE | SI_IMAGE_ACCESS_DCC_WRITE; image.format = util_format_linear(dstsurf->format); image.u.tex.level = dstsurf->u.tex.level; image.u.tex.first_layer = 0; /* 3D images ignore first_layer (BASE_ARRAY) */