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anv: switch to use the tcs_prog_data for dynamic input vertices

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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109>
This commit is contained in:
Lionel Landwerlin 2025-02-27 10:35:05 +02:00 • committed by Marge Bot
parent 7f500cc6e4
commit cb461fa287
4 changed files with 5 additions and 72 deletions
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44
src/intel/vulkan/anv_pipeline.c
View file

@ -265,8 +265,6 @@ struct anv_pipeline_stage {
bool uses_bt_for_push_descs;
enum anv_dynamic_push_bits dynamic_push_values;
union brw_any_prog_data prog_data;
uint32_t num_stats;
@ -798,36 +796,6 @@ shared_type_info(const struct glsl_type *type, unsigned *size, unsigned *align)
*align = comp_size * (length == 3 ? 4 : length);
}
static enum anv_dynamic_push_bits
anv_nir_compute_dynamic_push_bits(nir_shader *shader)
{
enum anv_dynamic_push_bits ret = 0;
nir_foreach_function_impl(impl, shader) {
nir_foreach_block(block, impl) {
nir_foreach_instr(instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
if (intrin->intrinsic != nir_intrinsic_load_push_constant)
continue;
switch (nir_intrinsic_base(intrin)) {
case anv_drv_const_offset(gfx.tcs_input_vertices):
ret |= ANV_DYNAMIC_PUSH_INPUT_VERTICES;
break;
default:
break;
}
}
}
}
return ret;
}
static void
anv_fixup_subgroup_size(struct anv_device *device, struct shader_info *info)
{
@ -1113,8 +1081,6 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
NIR_PASS_V(nir, anv_nir_update_resource_intel_block);
stage->dynamic_push_values = anv_nir_compute_dynamic_push_bits(nir);
NIR_PASS_V(nir, anv_nir_compute_push_layout,
pdevice, stage->key.base.robust_flags,
anv_graphics_pipeline_stage_fragment_dynamic(stage),
@ -2500,7 +2466,6 @@ anv_graphics_pipeline_compile(struct anv_graphics_base_pipeline *pipeline,
.xfb_info = stage->nir->xfb_info,
.bind_map = &stage->bind_map,
.push_desc_info = &stage->push_desc_info,
.dynamic_push_values = stage->dynamic_push_values,
};
stage->bin =
@ -2688,7 +2653,6 @@ anv_pipeline_compile_cs(struct anv_compute_pipeline *pipeline,
.num_stats = stage.num_stats,
.bind_map = &stage.bind_map,
.push_desc_info = &stage.push_desc_info,
.dynamic_push_values = stage.dynamic_push_values,
};
stage.bin = anv_device_upload_kernel(device, cache, &upload_params);
@ -2895,13 +2859,6 @@ anv_graphics_pipeline_emit(struct anv_graphics_pipeline *pipeline,
/* TODO(mesh): Mesh vs. Multiview with Instancing. */
}
pipeline->dynamic_patch_control_points =
anv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_CTRL) &&
BITSET_TEST(state->dynamic, MESA_VK_DYNAMIC_TS_PATCH_CONTROL_POINTS) &&
(pipeline->base.shaders[MESA_SHADER_TESS_CTRL]->dynamic_push_values &
ANV_DYNAMIC_PUSH_INPUT_VERTICES);
if (pipeline->base.shaders[MESA_SHADER_FRAGMENT] && state->ms) {
pipeline->sample_shading_enable = state->ms->sample_shading_enable;
pipeline->min_sample_shading = state->ms->min_sample_shading;
@ -3434,7 +3391,6 @@ compile_upload_rt_shader(struct anv_ray_tracing_pipeline *pipeline,
.num_stats = 1,
.bind_map = &stage->bind_map,
.push_desc_info = &stage->push_desc_info,
.dynamic_push_values = stage->dynamic_push_values,
};
stage->bin =

15
src/intel/vulkan/anv_pipeline_cache.c
View file

@ -213,8 +213,7 @@ anv_shader_bin_create(struct anv_device *device,
const struct brw_compile_stats *stats, uint32_t num_stats,
const nir_xfb_info *xfb_info_in,
const struct anv_pipeline_bind_map *bind_map,
const struct anv_push_descriptor_info *push_desc_info,
enum anv_dynamic_push_bits dynamic_push_values)
const struct anv_push_descriptor_info *push_desc_info)
{
VK_MULTIALLOC(ma);
VK_MULTIALLOC_DECL(&ma, struct anv_shader_bin, shader, 1);
@ -367,8 +366,6 @@ anv_shader_bin_create(struct anv_device *device,
shader->xfb_info = NULL;
}
shader->dynamic_push_values = dynamic_push_values;
typed_memcpy(&shader->push_desc_info, push_desc_info, 1);
shader->bind_map = *bind_map;
@ -434,8 +431,6 @@ anv_shader_bin_serialize(struct vk_pipeline_cache_object *object,
blob_write_uint32(blob, 0);
}
blob_write_uint32(blob, shader->dynamic_push_values);
blob_write_uint32(blob, shader->push_desc_info.used_descriptors);
blob_write_uint32(blob, shader->push_desc_info.fully_promoted_ubo_descriptors);
blob_write_uint8(blob, shader->push_desc_info.used_set_buffer);
@ -509,8 +504,6 @@ anv_shader_bin_deserialize(struct vk_pipeline_cache *cache,
if (xfb_size)
xfb_info = blob_read_bytes(blob, xfb_size);
enum anv_dynamic_push_bits dynamic_push_values = blob_read_uint32(blob);
struct anv_push_descriptor_info push_desc_info = {};
push_desc_info.used_descriptors = blob_read_uint32(blob);
push_desc_info.fully_promoted_ubo_descriptors = blob_read_uint32(blob);
@ -555,8 +548,7 @@ anv_shader_bin_deserialize(struct vk_pipeline_cache *cache,
kernel_data, kernel_size,
&prog_data.base, prog_data_size,
stats, num_stats, xfb_info, &bind_map,
&push_desc_info,
dynamic_push_values);
&push_desc_info);
ralloc_free(mem_ctx);
@ -613,8 +605,7 @@ anv_device_upload_kernel(struct anv_device *device,
params->num_stats,
params->xfb_info,
params->bind_map,
params->push_desc_info,
params->dynamic_push_values);
params->push_desc_info);
if (shader == NULL)
return NULL;

15
src/intel/vulkan/anv_private.h
View file

@ -1452,7 +1452,6 @@ struct nir_xfb_info;
struct anv_pipeline_bind_map;
struct anv_pipeline_sets_layout;
struct anv_push_descriptor_info;
enum anv_dynamic_push_bits;
void anv_device_init_embedded_samplers(struct anv_device *device);
void anv_device_finish_embedded_samplers(struct anv_device *device);
@ -4768,11 +4767,6 @@ struct anv_push_descriptor_info {
uint8_t used_set_buffer;
};
/* A list of values we push to implement some of the dynamic states */
enum anv_dynamic_push_bits {
ANV_DYNAMIC_PUSH_INPUT_VERTICES = BITFIELD_BIT(0),
};
struct anv_shader_upload_params {
gl_shader_stage stage;
@ -4793,8 +4787,6 @@ struct anv_shader_upload_params {
const struct anv_pipeline_bind_map *bind_map;
const struct anv_push_descriptor_info *push_desc_info;
enum anv_dynamic_push_bits dynamic_push_values;
};
struct anv_embedded_sampler {
@ -4826,8 +4818,6 @@ struct anv_shader_bin {
struct anv_pipeline_bind_map bind_map;
enum anv_dynamic_push_bits dynamic_push_values;
/* Not saved in the pipeline cache.
*
* Array of pointers of length bind_map.embedded_sampler_count
@ -4988,11 +4978,6 @@ struct anv_graphics_pipeline {
struct vk_sample_locations_state sample_locations;
struct vk_dynamic_graphics_state dynamic_state;
/* If true, the patch control points are passed through push constants
* (anv_push_constants::gfx::tcs_input_vertices)
*/
bool dynamic_patch_control_points;
uint32_t view_mask;
uint32_t instance_multiplier;

3
src/intel/vulkan/genX_gfx_state.c
View file

@ -2020,7 +2020,8 @@ cmd_buffer_flush_gfx_runtime_state(struct anv_gfx_dynamic_state *hw_state,
* the pipeline change or the dynamic value change, check the value and
* reemit if needed.
*/
if (pipeline->dynamic_patch_control_points &&
const struct brw_tcs_prog_data *tcs_prog_data = get_tcs_prog_data(pipeline);
if (tcs_prog_data && tcs_prog_data->input_vertices == 0 &&
((gfx->dirty & ANV_CMD_DIRTY_PIPELINE) ||
BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_TS_PATCH_CONTROL_POINTS)))
SET(TCS_INPUT_VERTICES, tcs_input_vertices, dyn->ts.patch_control_points);