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i965/vec4: Use UD rather than D for uniform indirects
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
parent
240d16ea94
commit
cb372b39ea
2 changed files with 6 additions and 6 deletions
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@ -709,7 +709,7 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
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assert(const_offset->u32[0] % 16 == 0);
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src.reg_offset = const_offset->u32[0] / 16;
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} else {
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src_reg tmp = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_D, 1);
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src_reg tmp = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_UD, 1);
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src.reladdr = new(mem_ctx) src_reg(tmp);
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}
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@ -758,7 +758,7 @@ vec4_visitor::emit_pull_constant_load_reg(dst_reg dst,
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pull->mlen = 2;
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pull->header_size = 1;
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} else if (devinfo->gen >= 7) {
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dst_reg grf_offset = dst_reg(this, glsl_type::int_type);
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dst_reg grf_offset = dst_reg(this, glsl_type::uint_type);
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grf_offset.type = offset_reg.type;
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@ -1594,14 +1594,14 @@ vec4_visitor::emit_pull_constant_load(bblock_t *block, vec4_instruction *inst,
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src_reg offset;
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if (orig_src.reladdr) {
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offset = src_reg(this, glsl_type::int_type);
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offset = src_reg(this, glsl_type::uint_type);
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emit_before(block, inst, ADD(dst_reg(offset), *orig_src.reladdr,
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brw_imm_d(reg_offset * 16)));
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brw_imm_ud(reg_offset * 16)));
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} else if (devinfo->gen >= 8) {
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/* Store the offset in a GRF so we can send-from-GRF. */
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offset = src_reg(this, glsl_type::int_type);
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emit_before(block, inst, MOV(dst_reg(offset), brw_imm_d(reg_offset * 16)));
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offset = src_reg(this, glsl_type::uint_type);
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emit_before(block, inst, MOV(dst_reg(offset), brw_imm_ud(reg_offset * 16)));
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} else {
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offset = brw_imm_d(reg_offset * 16);
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}
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