From cb32bcd3fea5abc0602a721fe430df8dfc109601 Mon Sep 17 00:00:00 2001
From: "Assadian, Navid" <navid.assadian@amd.com>
Date: Thu, 6 Jun 2024 14:31:31 -0400
Subject: [PATCH] amd/vpelib: Add 420 semi-planar 12bit handling

Adds semi-Planar 420 12 bits formats.

Reviewed-by: Roy Chan <roy.chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30715>
---
 .../vpelib/src/chip/vpe10/vpe10_resource.c    | 23 +++++++++++--------
 .../vpelib/src/chip/vpe11/vpe11_resource.c    | 21 +++++++++--------
 src/amd/vpelib/src/core/common.c              |  1 -
 3 files changed, 25 insertions(+), 20 deletions(-)

diff --git a/src/amd/vpelib/src/chip/vpe10/vpe10_resource.c b/src/amd/vpelib/src/chip/vpe10/vpe10_resource.c
index 2400cd9b3b2..a2ee419a159 100644
--- a/src/amd/vpelib/src/chip/vpe10/vpe10_resource.c
+++ b/src/amd/vpelib/src/chip/vpe10/vpe10_resource.c
@@ -164,22 +164,25 @@ static struct vpe_caps caps = {
                     .p010            = 1, /**< planar 4:2:0 10-bit */
                     .p016            = 0, /**< planar 4:2:0 16-bit */
                     .ayuv            = 0, /**< packed 4:4:4 */
-                    .yuy2            = 0  /**< packed 4:2:2 */
+                    .yuy2 = 0
                 },
-            .output_pixel_format_support = {.argb_packed_32b = 1,
-                .nv12                                        = 0,
-                .fp16                                        = 1,
-                .p010                                        = 0,
-                .p016                                        = 0,
-                .ayuv                                        = 0,
-                .yuy2                                        = 0},
-            .max_upscale_factor          = 64000,
+            .output_pixel_format_support =
+                {
+                    .argb_packed_32b = 1,
+                    .nv12            = 0,
+                    .fp16            = 1,
+                    .p010            = 0, /**< planar 4:2:0 10-bit */
+                    .p016            = 0, /**< planar 4:2:0 16-bit */
+                    .ayuv            = 0, /**< packed 4:4:4 */
+                    .yuy2 = 0
+                },
+            .max_upscale_factor = 64000,
 
             /*
              * 4:1 downscaling ratio : 1000 / 4 = 250
              * vpelib does not support more than 4:1 to preserve quality
              * due to the limitation of using maximum number of 8 taps
-            */
+             */
             .max_downscale_factor = 250,
 
             .pitch_alignment    = 256,
diff --git a/src/amd/vpelib/src/chip/vpe11/vpe11_resource.c b/src/amd/vpelib/src/chip/vpe11/vpe11_resource.c
index ff0a0d06e0b..f618da66822 100644
--- a/src/amd/vpelib/src/chip/vpe11/vpe11_resource.c
+++ b/src/amd/vpelib/src/chip/vpe11/vpe11_resource.c
@@ -116,16 +116,19 @@ static struct vpe_caps caps = {
                     .p010            = 1, /**< planar 4:2:0 10-bit */
                     .p016            = 0, /**< planar 4:2:0 16-bit */
                     .ayuv            = 0, /**< packed 4:4:4 */
-                    .yuy2            = 0  /**< packed 4:2:2 */
+                    .yuy2 = 0
                 },
-            .output_pixel_format_support = {.argb_packed_32b = 1,
-                .nv12                                        = 0,
-                .fp16                                        = 1,
-                .p010                                        = 0,
-                .p016                                        = 0,
-                .ayuv                                        = 0,
-                .yuy2                                        = 0},
-            .max_upscale_factor          = 64000,
+            .output_pixel_format_support =
+                {
+                    .argb_packed_32b = 1,
+                    .nv12            = 0,
+                    .fp16            = 1,
+                    .p010            = 0, /**< planar 4:2:0 10-bit */
+                    .p016            = 0, /**< planar 4:2:0 16-bit */
+                    .ayuv            = 0, /**< packed 4:4:4 */
+                    .yuy2 = 0
+                },
+            .max_upscale_factor = 64000,
 
             // 6:1 downscaling ratio: 1000/6 = 166.666
             .max_downscale_factor = 167,
diff --git a/src/amd/vpelib/src/core/common.c b/src/amd/vpelib/src/core/common.c
index 1322f2ed99e..95b6dd6c484 100644
--- a/src/amd/vpelib/src/core/common.c
+++ b/src/amd/vpelib/src/core/common.c
@@ -184,7 +184,6 @@ bool vpe_is_yuv444(enum vpe_surface_pixel_format format)
     return (vpe_is_yuv444_8(format) || vpe_is_yuv444_10(format));
 }
 
-
 static uint8_t vpe_get_element_size_in_bytes(enum vpe_surface_pixel_format format, int plane_idx)
 {
     switch (format) {