From cb14cddfa50759aea3f80bce07008f551c877ea2 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 30 Aug 2023 20:29:43 -0400 Subject: [PATCH] asahi: Clamp index buffer extent to what's read This makes for cleaner agxdecodes, I think this matches what I've seen on the macOS side but I might be misremembering. Certainly shouldn't hurt. This only applies for direct draws. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/asahi/agx_state.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c index df9d9ed1c7e..52b99d63bc8 100644 --- a/src/gallium/drivers/asahi/agx_state.c +++ b/src/gallium/drivers/asahi/agx_state.c @@ -2961,14 +2961,15 @@ agx_index_buffer_direct_ptr(struct agx_batch *batch, const struct pipe_draw_info *info, size_t *extent) { off_t offset = draw->start * info->index_size; + uint32_t max_extent = draw->count * info->index_size; if (!info->has_user_indices) { uint64_t base = agx_index_buffer_rsrc_ptr(batch, info, extent); - *extent = ALIGN_POT(*extent - offset, 4); + *extent = ALIGN_POT(MIN2(*extent - offset, max_extent), 4); return base + offset; } else { - *extent = ALIGN_POT(draw->count * info->index_size, 4); + *extent = ALIGN_POT(max_extent, 4); return agx_pool_upload_aligned(&batch->pool, ((uint8_t *)info->index.user) + offset,