fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 16:08:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

gallium/tgsi_to_nir: Set nir_intrinsic_align_mul to 16 and offset to 0

Browse source 
Since the alignment is now checked in the validator we must set it.

v2: Use alignement of 4, i.e. dest bit size by eight.
v3: Use alignment 16 (Rhys Perry & Jason Ekstand)
v4: Use nir_intrinsic_set_align to make it clear that align offset is 0
    (Jason)

Fixes: e78a7a1825
    nir: Assert memory loads are aligned

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4544>
This commit is contained in:
Gert Wollny 2020-04-13 19:51:42 +02:00 • committed by Marge Bot
parent 31988baba4
commit cb08f451d0
1 changed files with 1 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/gallium/auxiliary/nir/tgsi_to_nir.c
View file

@ -736,6 +736,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
}
/* UBO offsets are in bytes, but TGSI gives them to us in vec4's */
offset = nir_ishl(b, offset, nir_imm_int(b, 4));
nir_intrinsic_set_align(load, 16, 0);
} else {
nir_intrinsic_set_base(load, index);
if (indirect) {