diff --git a/src/intel/isl/isl_gfx7.c b/src/intel/isl/isl_gfx7.c
index f3c55625606..e949110ed52 100644
--- a/src/intel/isl/isl_gfx7.c
+++ b/src/intel/isl/isl_gfx7.c
@@ -237,12 +237,6 @@ isl_gfx6_filter_tiling(const struct isl_device *dev,
       *flags &= ~ISL_TILING_W_BIT;
    }
 
-   /* From the SKL+ PRMs, RENDER_SURFACE_STATE:TileMode,
-    *    If Surface Format is ASTC*, this field must be TILEMODE_YMAJOR.
-    */
-   if (isl_format_get_layout(info->format)->txc == ISL_TXC_ASTC)
-      *flags &= ISL_TILING_Y0_BIT;
-
    /* MCS buffers are always Y-tiled */
    if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS)
       *flags &= ISL_TILING_Y0_BIT;
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index aa946f123a0..fcfb4c5cf87 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -532,6 +532,14 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
 
 #if GFX_VER >= 8
    assert(GFX_VER < 12 || info->surf->tiling != ISL_TILING_W);
+
+   /* From the SKL+ PRMs, RENDER_SURFACE_STATE:TileMode,
+    *
+    *    If Surface Format is ASTC*, this field must be TILEMODE_YMAJOR.
+    */
+   if (isl_format_get_layout(info->view->format)->txc == ISL_TXC_ASTC)
+      assert(info->surf->tiling == ISL_TILING_Y0);
+
    s.TileMode = isl_encode_tiling[info->surf->tiling];
 #else
    s.TiledSurface = info->surf->tiling != ISL_TILING_LINEAR,