From caa5c23e481457bc0d717c758b9c90bf73cbce9e Mon Sep 17 00:00:00 2001 From: Sviatoslav Peleshko Date: Fri, 18 Aug 2023 00:46:00 +0300 Subject: [PATCH] intel/isl: Don't over-allocate CLEAR_COLOR size to use whole cache line At the time this was added to fix some test failures. But it seems that the failures were happening due to missing cache flushes, so this extra space is no longer neccessary. Fixes: 37b4eacc ("intel/isl: Resize clear color buffer to full cacheline") Signed-off-by: Sviatoslav Peleshko Reviewed-by: Nanley Chery Part-of: --- src/intel/isl/isl.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 6fc4b212904..31f4940ec46 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -307,8 +307,7 @@ isl_device_init(struct isl_device *dev, dev->ss.size = RENDER_SURFACE_STATE_length(info) * 4; dev->ss.align = isl_align(dev->ss.size, 32); - dev->ss.clear_color_state_size = - isl_align(CLEAR_COLOR_length(info) * 4, 64); + dev->ss.clear_color_state_size = CLEAR_COLOR_length(info) * 4; dev->ss.clear_color_state_offset = RENDER_SURFACE_STATE_ClearValueAddress_start(info) / 32 * 4;