r300: fix unconditional KIL on R300/R400

0: KIL -none.1111

Negate is not allowed for texturing opcodes, so the incorrect swizzle
was detected, however later optimization, where we try to rewrite incorrect
swizzles from constant (immediate) registers by adding a new ones with
correct order was interfering and not handling this correctly, so we
ended with

CONST[0] = {    -1.0000    -1.0000    -1.0000    -1.0000 }
  0: KIL const[0].xyz-w;

Even if it would get the swizzle right, texturing opcodes can't read from
constant registers, so just skip it and let this be handled by a later
part which inserts an extra mov instead.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Fixes: a8e1e5b5c2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22704>
(cherry picked from commit db6c3cd13d)
This commit is contained in:
Pavel Ondračka 2023-04-26 10:18:20 +02:00 committed by Eric Engestrom
parent 7ddbf31e62
commit ca6ceb4396
2 changed files with 2 additions and 1 deletions

View file

@ -67,7 +67,7 @@
"description": "r300: fix unconditional KIL on R300/R400",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "a8e1e5b5c2aeb7c2fb4eff2203a026090f0853b9"
},

View file

@ -580,6 +580,7 @@ void rc_dataflow_swizzles(struct radeon_compiler * c, void *user)
}
if (!c->is_r500 &&
c->Program.Constants.Count < R300_PFS_NUM_CONST_REGS &&
(!opcode->HasTexture && inst->U.I.Opcode != RC_OPCODE_KIL) &&
try_rewrite_constant(c, reg)) {
continue;
}