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Revert "intel/compiler: More peephole select"

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This reverts commit 8fb8ebfbb0.
This commit is contained in:
Dylan Baker 2019-02-11 16:26:37 -08:00
parent 9dd433dfa7
commit ca36eb12fd
1 changed files with 1 additions and 14 deletions
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15
src/intel/compiler/brw_nir.c
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@ -570,18 +570,7 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
OPT(nir_opt_dce);
OPT(nir_opt_cse);
/* Passing 0 to the peephole select pass causes it to convert
* if-statements that contain only move instructions in the branches
* regardless of the count.
*
* Passing 1 to the peephole select pass causes it to convert
* if-statements that contain at most a single ALU instruction (total)
* in both branches. Before Gen6, some math instructions were
* prohibitively expensive and the results of compare operations need an
* extra resolve step. For these reasons, this pass is more harmful
* than good on those platforms.
*
* For indirect loads of uniforms (push constants), we assume that array
/* For indirect loads of uniforms (push constants), we assume that array
* indices will nearly always be in bounds and the cost of the load is
* low. Therefore there shouldn't be a performance benefit to avoid it.
* However, in vec4 tessellation shaders, these loads operate by
@ -591,8 +580,6 @@ brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
(nir->info.stage == MESA_SHADER_TESS_CTRL ||
nir->info.stage == MESA_SHADER_TESS_EVAL);
OPT(nir_opt_peephole_select, 0, !is_vec4_tessellation);
if (compiler->devinfo->gen >= 6)
OPT(nir_opt_peephole_select, 1, !is_vec4_tessellation);
OPT(nir_opt_intrinsics);
OPT(nir_opt_idiv_const, 32);