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intel/compiler/xe2: TXD is lowered to SIMD16 in SIMD32 mode

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Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
This commit is contained in:
Ian Romanick 2022-08-22 18:00:09 -07:00 • committed by Jordan Justen
parent ef817650c9
commit c9f2857546
1 changed files with 4 additions and 2 deletions
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6
src/intel/compiler/brw_lower_logical_sends.cpp
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@ -953,8 +953,10 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
length++;
break;
case SHADER_OPCODE_TXD:
/* TXD should have been lowered in SIMD16 mode. */
assert(bld.dispatch_width() == 8);
/* TXD should have been lowered in SIMD16 mode (in SIMD32 mode in
* Xe2+).
*/
assert(bld.dispatch_width() == (8 * reg_unit(devinfo)));
/* Load dPdx and the coordinate together:
* [hdr], [ref], x, dPdx.x, dPdy.x, y, dPdx.y, dPdy.y, z, dPdx.z, dPdy.z