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radv: emit esgs itemsize register.

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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2017-01-20 12:41:19 +10:00
parent 77ec78669a
commit c9c8ae1fd3
1 changed files with 2 additions and 0 deletions
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2
src/amd/vulkan/radv_cmd_buffer.c
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@ -525,6 +525,8 @@ radv_emit_hw_es(struct radv_cmd_buffer *cmd_buffer,
ws->cs_add_buffer(cmd_buffer->cs, shader->bo, 8);
radeon_set_context_reg(cmd_buffer->cs, R_028AAC_VGT_ESGS_RING_ITEMSIZE,
shader->info.vs.esgs_itemsize / 4);
radeon_set_sh_reg_seq(cmd_buffer->cs, R_00B320_SPI_SHADER_PGM_LO_ES, 4);
radeon_emit(cmd_buffer->cs, va >> 8);
radeon_emit(cmd_buffer->cs, va >> 40);