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radeon/vcn: enable parsing support for st_rps_bits

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Set st_rps_bits in hevc message buffer and set corresponding flag to indicate
that st_rps_bits will be used for parsing the short_term_ref_pic_set structure.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
This commit is contained in:
Boyuan Zhang 2021-05-19 14:47:26 -04:00 • committed by Marge Bot
parent 9bd391bb64
commit c9baccb516
2 changed files with 4 additions and 0 deletions
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3
src/gallium/drivers/radeon/radeon_vcn_dec.c
View file

@ -198,6 +198,8 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
result.sps_info_flags |= 1 << 9;
if (pic->UseRefPicList == true)
result.sps_info_flags |= 1 << 10;
if (pic->UseStRpsBits == true)
result.sps_info_flags |= 1 << 11;
result.chroma_format = pic->pps->sps->chroma_format_idc;
result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
@ -257,6 +259,7 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
result.init_qp_minus26 = pic->pps->init_qp_minus26;
result.st_rps_bits = pic->pps->st_rps_bits;
for (i = 0; i < 19; ++i)
result.column_width_minus1[i] = pic->pps->column_width_minus1[i];

1
src/gallium/drivers/radeon/radeon_vcn_dec.h
View file

@ -745,6 +745,7 @@ typedef struct rvcn_dec_message_hevc_s {
unsigned char hevc_reserved[2];
unsigned char direct_reflist[2][15];
unsigned int st_rps_bits;
} rvcn_dec_message_hevc_t;
typedef struct rvcn_dec_message_vp9_s {