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intel/brw: Expose flag_mask/bit_mask fs helpers
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26887>
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2 changed files with 40 additions and 40 deletions
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@ -999,38 +999,6 @@ namespace {
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}
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}
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}
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/* Return the subset of flag registers that an instruction could
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* potentially read or write based on the execution controls and flag
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* subregister number of the instruction.
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*/
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unsigned
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flag_mask(const fs_inst *inst, unsigned width)
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{
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assert(util_is_power_of_two_nonzero(width));
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const unsigned start = (inst->flag_subreg * 16 + inst->group) &
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~(width - 1);
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const unsigned end = start + ALIGN(inst->exec_size, width);
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return ((1 << DIV_ROUND_UP(end, 8)) - 1) & ~((1 << (start / 8)) - 1);
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}
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unsigned
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bit_mask(unsigned n)
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{
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return (n >= CHAR_BIT * sizeof(bit_mask(n)) ? ~0u : (1u << n) - 1);
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}
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unsigned
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flag_mask(const fs_reg &r, unsigned sz)
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{
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if (r.file == ARF) {
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const unsigned start = (r.nr - BRW_ARF_FLAG) * 4 + r.subnr;
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const unsigned end = start + sz;
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return bit_mask(end) & ~bit_mask(start);
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} else {
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return 0;
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}
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}
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}
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unsigned
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@ -1042,13 +1010,13 @@ fs_inst::flags_read(const intel_device_info *devinfo) const
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* f0.0 and f1.0 on Gfx7+, and f0.0 and f0.1 on older hardware.
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*/
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const unsigned shift = devinfo->ver >= 7 ? 4 : 2;
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return flag_mask(this, 1) << shift | flag_mask(this, 1);
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return brw_fs_flag_mask(this, 1) << shift | brw_fs_flag_mask(this, 1);
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} else if (predicate) {
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return flag_mask(this, predicate_width(devinfo, predicate));
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return brw_fs_flag_mask(this, predicate_width(devinfo, predicate));
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} else {
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unsigned mask = 0;
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for (int i = 0; i < sources; i++) {
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mask |= flag_mask(src[i], size_read(i));
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mask |= brw_fs_flag_mask(src[i], size_read(i));
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}
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return mask;
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}
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@ -1066,13 +1034,13 @@ fs_inst::flags_written(const intel_device_info *devinfo) const
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opcode != BRW_OPCODE_IF &&
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opcode != BRW_OPCODE_WHILE)) ||
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opcode == FS_OPCODE_FB_WRITE) {
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return flag_mask(this, 1);
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return brw_fs_flag_mask(this, 1);
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} else if (opcode == SHADER_OPCODE_FIND_LIVE_CHANNEL ||
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opcode == SHADER_OPCODE_FIND_LAST_LIVE_CHANNEL ||
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opcode == FS_OPCODE_LOAD_LIVE_CHANNELS) {
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return flag_mask(this, 32);
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return brw_fs_flag_mask(this, 32);
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} else {
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return flag_mask(dst, size_written);
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return brw_fs_flag_mask(dst, size_written);
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}
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}
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@ -2968,7 +2936,7 @@ needs_src_copy(const fs_builder &lbld, const fs_inst *inst, unsigned i)
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(inst->components_read(i) == 1 &&
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lbld.dispatch_width() <= inst->exec_size)) ||
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(inst->flags_written(lbld.shader->devinfo) &
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flag_mask(inst->src[i], type_sz(inst->src[i].type)));
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brw_fs_flag_mask(inst->src[i], type_sz(inst->src[i].type)));
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}
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/**
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@ -3801,7 +3769,7 @@ brw_fs_workaround_nomask_control_flow(fs_visitor &s)
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* and restore the flag register if it's live.
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*/
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const bool save_flag = flag_liveout &
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flag_mask(flag, s.dispatch_width / 8);
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brw_fs_flag_mask(flag, s.dispatch_width / 8);
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const fs_reg tmp = ubld.group(8, 0).vgrf(flag.type);
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if (save_flag) {
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@ -734,4 +734,36 @@ is_coalescing_payload(const brw::simple_allocator &alloc, const fs_inst *inst)
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bool
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has_bank_conflict(const struct brw_isa_info *isa, const fs_inst *inst);
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/* Return the subset of flag registers that an instruction could
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* potentially read or write based on the execution controls and flag
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* subregister number of the instruction.
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*/
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static inline unsigned
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brw_fs_flag_mask(const fs_inst *inst, unsigned width)
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{
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assert(util_is_power_of_two_nonzero(width));
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const unsigned start = (inst->flag_subreg * 16 + inst->group) &
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~(width - 1);
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const unsigned end = start + ALIGN(inst->exec_size, width);
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return ((1 << DIV_ROUND_UP(end, 8)) - 1) & ~((1 << (start / 8)) - 1);
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}
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static inline unsigned
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brw_fs_bit_mask(unsigned n)
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{
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return (n >= CHAR_BIT * sizeof(brw_fs_bit_mask(n)) ? ~0u : (1u << n) - 1);
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}
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static inline unsigned
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brw_fs_flag_mask(const fs_reg &r, unsigned sz)
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{
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if (r.file == ARF) {
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const unsigned start = (r.nr - BRW_ARF_FLAG) * 4 + r.subnr;
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const unsigned end = start + sz;
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return brw_fs_bit_mask(end) & ~brw_fs_bit_mask(start);
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} else {
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return 0;
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}
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}
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#endif
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