diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
index f875f00dd13..ee171e08bc7 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
@@ -362,25 +362,6 @@ nvc0_compute_upload_input(struct nvc0_context *nvc0,
 {
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
    struct nvc0_screen *screen = nvc0->screen;
-   struct nvc0_program *cp = nvc0->compprog;
-
-   if (cp->parm_size) {
-      struct nouveau_bo *bo = screen->uniform_bo;
-      const unsigned base = NVC0_CB_USR_INFO(5);
-
-      BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
-      PUSH_DATA (push, align(cp->parm_size, 0x100));
-      PUSH_DATAh(push, bo->offset + base);
-      PUSH_DATA (push, bo->offset + base);
-      BEGIN_NVC0(push, NVC0_CP(CB_BIND), 1);
-      PUSH_DATA (push, (0 << 8) | 1);
-      /* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */
-      BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + cp->parm_size / 4);
-      PUSH_DATA (push, 0);
-      PUSH_DATAp(push, info->input, cp->parm_size / 4);
-
-      nvc0_compute_invalidate_constbufs(nvc0);
-   }
 
    BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
    PUSH_DATA (push, NVC0_CB_AUX_SIZE);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
index d34321d06a2..2e2b5bb945e 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.h
@@ -32,7 +32,6 @@ struct nvc0_program {
    uint32_t *code;
    unsigned code_base;
    unsigned code_size;
-   unsigned parm_size; /* size of non-bindable uniforms (c0[]) */
 
    uint32_t hdr[NVC0_MAX_SHADER_HEADER_SIZE/4];
    uint32_t flags[2];
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
index 4146ad1bc76..25b1d048471 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
@@ -2472,7 +2472,6 @@ nvc0_hw_sm_get_program(struct nvc0_screen *screen)
 
    prog->type = PIPE_SHADER_COMPUTE;
    prog->translated = true;
-   prog->parm_size = 12;
 
    if (screen->base.class_3d >= GM107_3D_CLASS) {
       prog->code = (uint32_t *)gm107_read_hw_sm_counters_code;
@@ -2542,7 +2541,6 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
    struct nvc0_program *old = nvc0->compprog;
    struct pipe_grid_info info = {};
    uint32_t mask;
-   uint32_t input[3];
    const uint block[3] = { 32, is_nve4 ? 4 : 1, 1 };
    const uint grid[3] = { screen->mp_count, screen->gpc_count, 1 };
    unsigned c, i;
@@ -2587,7 +2585,6 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
       info.grid[i] = grid[i];
    }
    info.pc = 0;
-   info.input = input;
    pipe->launch_grid(pipe, &info);
    pipe->bind_compute_state(pipe, old);
 
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
index 9af2601b335..042f661e7b5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c
@@ -479,22 +479,10 @@ nve4_compute_upload_input(struct nvc0_context *nvc0,
 {
    struct nvc0_screen *screen = nvc0->screen;
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
-   struct nvc0_program *cp = nvc0->compprog;
    uint64_t address;
 
    address = screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5);
 
-   if (cp->parm_size) {
-      BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
-      PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
-      PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
-      BEGIN_NVC0(push, NVE4_CP(UPLOAD_LINE_LENGTH_IN), 2);
-      PUSH_DATA (push, cp->parm_size);
-      PUSH_DATA (push, 0x1);
-      BEGIN_1IC0(push, NVE4_CP(UPLOAD_EXEC), 1 + DIV_ROUND_UP(cp->parm_size, 4));
-      PUSH_DATA (push, NVE4_COMPUTE_UPLOAD_EXEC_LINEAR | (0x20 << 1));
-      PUSH_DATAb(push, info->input, cp->parm_size);
-   }
    BEGIN_NVC0(push, NVE4_CP(UPLOAD_DST_ADDRESS_HIGH), 2);
    PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO(0));
    PUSH_DATA (push, address + NVC0_CB_AUX_GRID_INFO(0));
@@ -631,7 +619,7 @@ nve4_compute_setup_launch_desc(struct nvc0_context *nvc0, uint32_t *qmd,
    // Only bind user uniforms and the driver constant buffer through the
    // launch descriptor because UBOs are sticked to the driver cb to avoid the
    // limitation of 8 CBs.
-   if (nvc0->constbuf[5][0].user || cp->parm_size) {
+   if (nvc0->constbuf[5][0].user) {
       nve4_cp_launch_desc_set_cb(qmd, 0, screen->uniform_bo,
                                  NVC0_CB_USR_INFO(5), 1 << 16);
 
@@ -678,7 +666,7 @@ gp100_compute_setup_launch_desc(struct nvc0_context *nvc0, uint32_t *qmd,
    // Only bind user uniforms and the driver constant buffer through the
    // launch descriptor because UBOs are sticked to the driver cb to avoid the
    // limitation of 8 CBs.
-   if (nvc0->constbuf[5][0].user || cp->parm_size) {
+   if (nvc0->constbuf[5][0].user) {
       gp100_cp_launch_desc_set_cb(qmd, 0, screen->uniform_bo,
                                   NVC0_CB_USR_INFO(5), 1 << 16);
 
@@ -739,7 +727,7 @@ gv100_compute_setup_launch_desc(struct nvc0_context *nvc0, u32 *qmd,
    // Only bind user uniforms and the driver constant buffer through the
    // launch descriptor because UBOs are sticked to the driver cb to avoid the
    // limitation of 8 CBs.
-   if (nvc0->constbuf[5][0].user || cp->parm_size) {
+   if (nvc0->constbuf[5][0].user) {
       gp100_cp_launch_desc_set_cb(qmd, 0, screen->uniform_bo,
                                   NVC0_CB_USR_INFO(5), 1 << 16);