i965: Calculate start/base_vertex_location after preparing vertices.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

src/mesa/drivers/dri/i965/brw_context.h

@@ -1061,6 +1061,14 @@ struct brw_context
    /* Whether the last depth/stencil packets were both NULL. */
    bool no_depth_or_stencil;
 
+   struct {
+      /** Does the current draw use the index buffer? */
+      bool indexed;
+
+      int start_vertex_location;
+      int base_vertex_location;
+   } draw;
+
    struct {
       struct brw_vertex_element inputs[VERT_ATTRIB_MAX];
       struct brw_vertex_buffer buffers[VERT_ATTRIB_MAX];

src/mesa/drivers/dri/i965/brw_draw.c

@@ -176,26 +176,19 @@ static void brw_emit_prim(struct brw_context *brw,
 {
    int verts_per_instance;
    int vertex_access_type;
-   int start_vertex_location;
-   int base_vertex_location;
    int indirect_flag;
 
    DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
        prim->start, prim->count);
 
-   start_vertex_location = prim->start;
-   base_vertex_location = prim->basevertex;
    if (prim->indexed) {
       vertex_access_type = brw->gen >= 7 ?
          GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
          GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
-      start_vertex_location += brw->ib.start_vertex_offset;
-      base_vertex_location += brw->vb.start_vertex_bias;
    } else {
       vertex_access_type = brw->gen >= 7 ?
          GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL :
          GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
-      start_vertex_location += brw->vb.start_vertex_bias;
    }
 
    /* We only need to trim the primitive count on pre-Gen6. */
@@ -270,10 +263,10 @@ static void brw_emit_prim(struct brw_context *brw,
                 vertex_access_type);
    }
    OUT_BATCH(verts_per_instance);
-   OUT_BATCH(start_vertex_location);
+   OUT_BATCH(brw->draw.start_vertex_location);
    OUT_BATCH(prim->num_instances);
    OUT_BATCH(prim->base_instance);
-   OUT_BATCH(base_vertex_location);
+   OUT_BATCH(brw->draw.base_vertex_location);
    ADVANCE_BATCH();
 
    /* Only used on Sandybridge; harmless to set elsewhere. */
@@ -436,12 +429,18 @@ static bool brw_try_draw_prims( struct gl_context *ctx,
             brw_merge_inputs(brw, arrays);
          }
       }
+
+      brw->draw.indexed = prims[i].indexed;
+      brw->draw.start_vertex_location = prims[i].start;
+      brw->draw.base_vertex_location = prims[i].basevertex;
+
       if (brw->gen < 6)
 	 brw_set_prim(brw, &prims[i]);
       else
 	 gen6_set_prim(brw, &prims[i]);
 
 retry:
+
       /* Note that before the loop, brw->state.dirty.brw was set to != 0, and
        * that the state updated in the loop outside of this block is that in
        * *_set_prim or intel_batchbuffer_flush(), which only impacts

src/mesa/drivers/dri/i965/brw_draw.h

@@ -47,6 +47,8 @@ void brw_draw_prims( struct gl_context *ctx,
 void brw_draw_init( struct brw_context *brw );
 void brw_draw_destroy( struct brw_context *brw );
 
+void brw_prepare_shader_draw_parameters(struct brw_context *);
+
 /* brw_primitive_restart.c */
 GLboolean
 brw_handle_primitive_restart(struct gl_context *ctx,

src/mesa/drivers/dri/i965/brw_draw_upload.c

@@ -604,12 +604,24 @@ brw_prepare_vertices(struct brw_context *brw)
    brw->vb.nr_buffers = j;
 }
 
+void
+brw_prepare_shader_draw_parameters(struct brw_context *brw)
+{
+   if (brw->draw.indexed) {
+      brw->draw.start_vertex_location += brw->ib.start_vertex_offset;
+      brw->draw.base_vertex_location += brw->vb.start_vertex_bias;
+   } else {
+      brw->draw.start_vertex_location += brw->vb.start_vertex_bias;
+   }
+}
+
 static void brw_emit_vertices(struct brw_context *brw)
 {
    struct gl_context *ctx = &brw->ctx;
    GLuint i, nr_elements;
 
    brw_prepare_vertices(brw);
+   brw_prepare_shader_draw_parameters(brw);
 
    brw_emit_query_begin(brw);
 

src/mesa/drivers/dri/i965/brw_state_upload.c

@@ -98,7 +98,7 @@ static const struct brw_tracked_state *gen4_atoms[] =
    &brw_psp_urb_cbs,
 
    &brw_drawing_rect,
-   &brw_indices,
+   &brw_indices, /* must come before brw_vertices */
    &brw_index_buffer,
    &brw_vertices,
 
@@ -169,7 +169,7 @@ static const struct brw_tracked_state *gen6_atoms[] =
 
    &brw_drawing_rect,
 
-   &brw_indices,
+   &brw_indices, /* must come before brw_vertices */
    &brw_index_buffer,
    &brw_vertices,
 };
@@ -244,7 +244,7 @@ static const struct brw_tracked_state *gen7_atoms[] =
 
    &brw_drawing_rect,
 
-   &brw_indices,
+   &brw_indices, /* must come before brw_vertices */
    &brw_index_buffer,
    &brw_vertices,
 

src/mesa/drivers/dri/i965/gen8_draw_upload.c

@@ -41,6 +41,7 @@ gen8_emit_vertices(struct brw_context *brw)
    struct gl_context *ctx = &brw->ctx;
 
    brw_prepare_vertices(brw);
+   brw_prepare_shader_draw_parameters(brw);
 
    if (brw->vs.prog_data->uses_vertexid) {
       unsigned vue = brw->vb.nr_enabled;