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remove hashing for bm buffers, use an opaque pointer instead of an integer

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This commit is contained in:
Keith Whitwell 2006-08-29 11:45:13 +00:00
parent 62920e2ab2
commit c863e63549
26 changed files with 220 additions and 214 deletions
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2
src/mesa/drivers/dri/i915/i830_context.h
View file

@ -116,7 +116,7 @@ struct i830_hw_state {
* be from a PBO or FBO. Just use the buffer id. Will have to do
* this for draw and depth for FBO's...
*/
GLuint tex_buffer[I830_TEX_UNITS];
struct buffer *tex_buffer[I830_TEX_UNITS];
GLuint tex_offset[I830_TEX_UNITS];
GLuint emitted; /* I810_UPLOAD_* */

2
src/mesa/drivers/dri/i915/i830_metaops.c
View file

@ -227,7 +227,7 @@ static void set_texture_blend_replace( struct intel_context *intel )
* (including the front or back buffer).
*/
static GLboolean set_tex_rect_source( struct intel_context *intel,
GLuint buffer,
struct buffer *buffer,
GLuint offset,
GLuint pitch,
GLuint height,

24
src/mesa/drivers/dri/i915/i830_vtbl.c
View file

@ -28,13 +28,13 @@
#include "i830_context.h"
#include "i830_reg.h"
#include "intel_batchbuffer.h"
#include "intel_regions.h"
#include "tnl/t_context.h"
#include "tnl/t_vertex.h"
#define FILE_DEBUG_FLAG DEBUG_STATE
static GLboolean i830_check_vertex_size( struct intel_context *intel,
GLuint expected );
@ -409,21 +409,18 @@ static void i830_emit_state( struct intel_context *intel )
0);
if (dirty & I830_UPLOAD_INVARIENT) {
if (INTEL_DEBUG & DEBUG_STATE)
fprintf(stderr, "I830_UPLOAD_INVARIENT:\n");
DBG("I830_UPLOAD_INVARIENT:\n");
i830_emit_invarient_state( intel );
}
if (dirty & I830_UPLOAD_CTX) {
if (INTEL_DEBUG & DEBUG_STATE)
fprintf(stderr, "I830_UPLOAD_CTX:\n");
DBG("I830_UPLOAD_CTX:\n");
emit( i830, state->Ctx, sizeof(state->Ctx) );
}
if (dirty & I830_UPLOAD_BUFFERS) {
if (INTEL_DEBUG & DEBUG_STATE)
fprintf(stderr, "I830_UPLOAD_BUFFERS:\n");
DBG("I830_UPLOAD_BUFFERS:\n");
BEGIN_BATCH(I830_DEST_SETUP_SIZE+2, 0);
OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR0]);
OUT_BATCH(state->Buffer[I830_DESTREG_CBUFADDR1]);
@ -445,15 +442,13 @@ static void i830_emit_state( struct intel_context *intel )
}
if (dirty & I830_UPLOAD_STIPPLE) {
if (INTEL_DEBUG & DEBUG_STATE)
fprintf(stderr, "I830_UPLOAD_STIPPLE:\n");
DBG("I830_UPLOAD_STIPPLE:\n");
emit( i830, state->Stipple, sizeof(state->Stipple) );
}
for (i = 0; i < I830_TEX_UNITS; i++) {
if ((dirty & I830_UPLOAD_TEX(i))) {
if (INTEL_DEBUG & DEBUG_STATE)
fprintf(stderr, "I830_UPLOAD_TEX(%d):\n", i);
DBG("I830_UPLOAD_TEX(%d):\n", i);
BEGIN_BATCH(I830_TEX_SETUP_SIZE+1, 0);
OUT_BATCH(state->Tex[i][I830_TEXREG_TM0LI]);
@ -478,9 +473,8 @@ static void i830_emit_state( struct intel_context *intel )
}
if (dirty & I830_UPLOAD_TEXBLEND(i)) {
if (INTEL_DEBUG & DEBUG_STATE)
fprintf(stderr, "I830_UPLOAD_TEXBLEND(%d): %d words\n", i,
state->TexBlendWordsUsed[i]);
DBG("I830_UPLOAD_TEXBLEND(%d): %d words\n", i,
state->TexBlendWordsUsed[i]);
emit( i830, state->TexBlend[i],
state->TexBlendWordsUsed[i] * 4 );
}

2
src/mesa/drivers/dri/i915/i915_context.h
View file

@ -219,7 +219,7 @@ struct i915_hw_state {
* be from a PBO or FBO. Just use the buffer id. Will have to do
* this for draw and depth for FBO's...
*/
GLuint tex_buffer[I915_TEX_UNITS];
struct buffer *tex_buffer[I915_TEX_UNITS];
GLuint tex_offset[I915_TEX_UNITS];

2
src/mesa/drivers/dri/i915/i915_metaops.c
View file

@ -327,7 +327,7 @@ static void meta_texture_blend_replace( struct intel_context *intel )
* (including the front or back buffer).
*/
static GLboolean meta_tex_rect_source( struct intel_context *intel,
GLuint buffer,
struct buffer *buffer,
GLuint offset,
GLuint pitch,
GLuint height,

2
src/mesa/drivers/dri/i915/i915_tex_layout.c
View file

@ -32,6 +32,8 @@
#include "intel_mipmap_tree.h"
#include "macros.h"
#define FILE_DEBUG_FLAG DEBUG_TEXTURE
static GLint initial_offsets[6][2] = { {0,0},
{0,2},
{1,0},

37
src/mesa/drivers/dri/i915/intel_batchbuffer.c
View file

@ -82,7 +82,7 @@ static void intel_dump_batchbuffer( GLuint offset,
void intel_batchbuffer_reset( struct intel_batchbuffer *batch )
{
bmBufferData(batch->bm,
bmBufferData(batch->intel,
batch->buffer,
BATCH_SZ,
NULL,
@ -96,14 +96,14 @@ void intel_batchbuffer_reset( struct intel_batchbuffer *batch )
batch->nr_relocs = 0;
batch->flags = 0;
bmAddBuffer( batch->bm,
bmAddBuffer( batch->intel,
batch->list,
batch->buffer,
DRM_MM_TT,
NULL,
&batch->offset[batch->list_count++]);
batch->map = bmMapBuffer(batch->bm, batch->buffer, DRM_MM_WRITE);
batch->map = bmMapBuffer(batch->intel, batch->buffer, DRM_MM_WRITE);
batch->ptr = batch->map;
}
@ -115,10 +115,9 @@ struct intel_batchbuffer *intel_batchbuffer_alloc( struct intel_context *intel )
struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
batch->intel = intel;
batch->bm = intel->bm;
bmGenBuffers(intel->bm, 1, &batch->buffer, BM_BATCHBUFFER);
batch->last_fence = bmInitFence(batch->bm);
bmGenBuffers(intel, "batchbuffer", 1, &batch->buffer, BM_BATCHBUFFER);
batch->last_fence = bmInitFence(batch->intel);
intel_batchbuffer_reset( batch );
return batch;
}
@ -126,7 +125,7 @@ struct intel_batchbuffer *intel_batchbuffer_alloc( struct intel_context *intel )
void intel_batchbuffer_free( struct intel_batchbuffer *batch )
{
if (batch->map)
bmUnmapBuffer(batch->bm, batch->buffer);
bmUnmapBuffer(batch->intel, batch->buffer);
free(batch);
}
@ -141,7 +140,7 @@ static void do_flush_locked( struct intel_batchbuffer *batch,
GLuint *ptr;
GLuint i;
bmValidateBufferList( batch->bm,
bmValidateBufferList( batch->intel,
batch->list,
DRM_MM_TT );
@ -149,7 +148,7 @@ static void do_flush_locked( struct intel_batchbuffer *batch,
* whole task should be done internally by the memory manager, and
* that dma buffers probably need to be pinned within agp space.
*/
ptr = (GLuint *)bmMapBuffer(batch->bm, batch->buffer, DRM_MM_WRITE);
ptr = (GLuint *)bmMapBuffer(batch->intel, batch->buffer, DRM_MM_WRITE);
for (i = 0; i < batch->nr_relocs; i++) {
@ -159,22 +158,20 @@ static void do_flush_locked( struct intel_batchbuffer *batch,
ptr[r->offset/4] = batch->offset[r->elem] + r->delta;
}
if (INTEL_DEBUG & DEBUG_DMA)
if (INTEL_DEBUG & DEBUG_BATCH)
intel_dump_batchbuffer( 0, ptr, used );
bmUnmapBuffer(batch->bm, batch->buffer);
bmUnmapBuffer(batch->intel, batch->buffer);
/* Fire the batch buffer, which was uploaded above:
*/
#if 1
intel_batch_ioctl(batch->intel,
batch->offset[0],
used,
ignore_cliprects,
allow_unlock);
#endif
batch->last_fence = bmFenceBufferList(batch->bm, batch->list);
batch->last_fence = bmFenceBufferList(batch->intel, batch->list);
if (!batch->intel->last_swap_fence_retired) {
int retired;
drmFence dFence = {0,batch->intel->last_swap_fence};
@ -213,7 +210,7 @@ GLuint intel_batchbuffer_flush( struct intel_batchbuffer *batch )
used += 8;
}
bmUnmapBuffer(batch->bm, batch->buffer);
bmUnmapBuffer(batch->intel, batch->buffer);
batch->ptr = NULL;
batch->map = NULL;
@ -241,7 +238,7 @@ GLuint intel_batchbuffer_flush( struct intel_batchbuffer *batch )
void intel_batchbuffer_finish( struct intel_batchbuffer *batch )
{
bmFinishFence(batch->bm,
bmFinishFence(batch->intel,
intel_batchbuffer_flush(batch));
}
@ -249,7 +246,7 @@ void intel_batchbuffer_finish( struct intel_batchbuffer *batch )
/* This is the only way buffers get added to the validate list.
*/
GLboolean intel_batchbuffer_emit_reloc( struct intel_batchbuffer *batch,
GLuint buffer,
struct buffer *buffer,
GLuint flags,
GLuint delta )
{
@ -257,10 +254,10 @@ GLboolean intel_batchbuffer_emit_reloc( struct intel_batchbuffer *batch,
assert(batch->nr_relocs <= MAX_RELOCS);
i = bmScanBufferList(batch->bm, batch->list, buffer);
i = bmScanBufferList(batch->intel, batch->list, buffer);
if (i == -1) {
i = batch->list_count;
bmAddBuffer(batch->bm,
bmAddBuffer(batch->intel,
batch->list,
buffer,
flags,

4
src/mesa/drivers/dri/i915/intel_batchbuffer.h
View file

@ -24,7 +24,7 @@ struct intel_batchbuffer {
struct bufmgr *bm;
struct intel_context *intel;
GLuint buffer;
struct buffer *buffer;
GLuint last_fence;
GLuint flags;
@ -65,7 +65,7 @@ void intel_batchbuffer_release_space(struct intel_batchbuffer *batch,
GLuint bytes);
GLboolean intel_batchbuffer_emit_reloc( struct intel_batchbuffer *batch,
GLuint buffer,
struct buffer *buffer,
GLuint flags,
GLuint offset );

13
src/mesa/drivers/dri/i915/intel_blit.c
View file

@ -43,6 +43,7 @@
#include "intel_bufmgr.h"
#define FILE_DEBUG_FLAG DEBUG_BLIT
/**
* Copy the back color buffer to the front color buffer.
@ -75,7 +76,7 @@ void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
*/
if (!intel->last_swap_fence_retired) {
bmFinishFence(intel->bm, intel->last_swap_fence);
bmFinishFence(intel, intel->last_swap_fence);
}
@ -196,7 +197,7 @@ void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
void intelEmitFillBlit( struct intel_context *intel,
GLuint cpp,
GLshort dst_pitch,
GLuint dst_buffer,
struct buffer *dst_buffer,
GLuint dst_offset,
GLshort x, GLshort y,
GLshort w, GLshort h,
@ -223,7 +224,7 @@ void intelEmitFillBlit( struct intel_context *intel,
return;
}
DBG("%s dst:buf(%d)/%d+%d %d,%d sz:%dx%d\n",
DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__,
dst_buffer, dst_pitch, dst_offset, x, y,
w,h);
@ -245,10 +246,10 @@ void intelEmitFillBlit( struct intel_context *intel,
void intelEmitCopyBlit( struct intel_context *intel,
GLuint cpp,
GLshort src_pitch,
GLuint src_buffer,
struct buffer *src_buffer,
GLuint src_offset,
GLshort dst_pitch,
GLuint dst_buffer,
struct buffer *dst_buffer,
GLuint dst_offset,
GLshort src_x, GLshort src_y,
GLshort dst_x, GLshort dst_y,
@ -260,7 +261,7 @@ void intelEmitCopyBlit( struct intel_context *intel,
BATCH_LOCALS;
DBG("%s src:buf(%d)/%d+%d %d,%d dst:buf(%d)/%d+%d %d,%d sz:%dx%d\n",
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__,
src_buffer, src_pitch, src_offset, src_x, src_y,
dst_buffer, dst_pitch, dst_offset, dst_x, dst_y,

6
src/mesa/drivers/dri/i915/intel_blit.h
View file

@ -40,10 +40,10 @@ extern void intelClearWithBlit(GLcontext *ctx, GLbitfield mask, GLboolean all,
extern void intelEmitCopyBlit( struct intel_context *intel,
GLuint cpp,
GLshort src_pitch,
GLuint src_buffer,
struct buffer *src_buffer,
GLuint src_offset,
GLshort dst_pitch,
GLuint dst_buffer,
struct buffer *dst_buffer,
GLuint dst_offset,
GLshort srcx, GLshort srcy,
GLshort dstx, GLshort dsty,
@ -52,7 +52,7 @@ extern void intelEmitCopyBlit( struct intel_context *intel,
extern void intelEmitFillBlit( struct intel_context *intel,
GLuint cpp,
GLshort dst_pitch,
GLuint dst_buffer,
struct buffer *dst_buffer,
GLuint dst_offset,
GLshort x, GLshort y,
GLshort w, GLshort h,

16
src/mesa/drivers/dri/i915/intel_buffer_objects.c
View file

@ -52,7 +52,7 @@ static struct gl_buffer_object *intel_bufferobj_alloc( GLcontext *ctx,
/* XXX: We generate our own handle, which is different to 'name' above.
*/
bmGenBuffers(intel->bm, 1, &obj->buffer, 0);
bmGenBuffers(intel, "bufferobj", 1, &obj->buffer, 0);
return &obj->Base;
}
@ -71,7 +71,7 @@ static void intel_bufferobj_free( GLcontext *ctx,
assert(intel_obj);
if (intel_obj->buffer)
bmDeleteBuffers( intel->bm, 1, &intel_obj->buffer );
bmDeleteBuffers( intel, 1, &intel_obj->buffer );
_mesa_free(intel_obj);
}
@ -102,7 +102,7 @@ static void intel_bufferobj_data( GLcontext *ctx,
obj->Size = size;
obj->Usage = usage;
bmBufferData(intel->bm, intel_obj->buffer, size, data, 0);
bmBufferData(intel, intel_obj->buffer, size, data, 0);
}
@ -123,7 +123,7 @@ static void intel_bufferobj_subdata( GLcontext *ctx,
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
assert(intel_obj);
bmBufferSubData(intel->bm, intel_obj->buffer, offset, size, data);
bmBufferSubData(intel, intel_obj->buffer, offset, size, data);
}
@ -141,7 +141,7 @@ static void intel_bufferobj_get_subdata( GLcontext *ctx,
struct intel_buffer_object *intel_obj = intel_buffer_object(obj);
assert(intel_obj);
bmBufferGetSubData(intel->bm, intel_obj->buffer, offset, size, data);
bmBufferGetSubData(intel, intel_obj->buffer, offset, size, data);
}
@ -160,7 +160,7 @@ static void *intel_bufferobj_map( GLcontext *ctx,
/* XXX: Translate access to flags arg below:
*/
assert(intel_obj);
obj->Pointer = bmMapBuffer(intel->bm, intel_obj->buffer, 0);
obj->Pointer = bmMapBuffer(intel, intel_obj->buffer, 0);
return obj->Pointer;
}
@ -177,12 +177,12 @@ static GLboolean intel_bufferobj_unmap( GLcontext *ctx,
assert(intel_obj);
assert(obj->Pointer);
bmUnmapBuffer(intel->bm, intel_obj->buffer);
bmUnmapBuffer(intel, intel_obj->buffer);
obj->Pointer = NULL;
return GL_TRUE;
}
GLuint intel_bufferobj_buffer( const struct intel_buffer_object *intel_obj )
struct buffer *intel_bufferobj_buffer( const struct intel_buffer_object *intel_obj )
{
return intel_obj->buffer;
}

4
src/mesa/drivers/dri/i915/intel_buffer_objects.h
View file

@ -39,13 +39,13 @@ struct gl_buffer_object;
*/
struct intel_buffer_object {
struct gl_buffer_object Base;
GLuint buffer; /* the low-level buffer manager's buffer handle */
struct buffer *buffer; /* the low-level buffer manager's buffer handle */
};
/* Get the bm buffer associated with a GL bufferobject:
*/
GLuint intel_bufferobj_buffer( const struct intel_buffer_object *obj );
struct buffer *intel_bufferobj_buffer( const struct intel_buffer_object *obj );
/* Hook the bufferobject implementation into mesa:
*/

33
src/mesa/drivers/dri/i915/intel_buffers.c
View file

@ -394,9 +394,8 @@ void intelRotateWindow(struct intel_context *intel,
GLuint srcBuf)
{
intelScreenPrivate *screen = intel->intelScreen;
const GLuint cpp = screen->cpp;
drm_clip_rect_t fullRect;
GLuint srcOffset, srcPitch;
struct intel_region *src;
const drm_clip_rect_t *clipRects;
int numClipRects;
int i;
@ -447,7 +446,18 @@ void intelRotateWindow(struct intel_context *intel,
intel->rotated_region,
NULL ); /* ? */
if (cpp == 4) {
if (srcBuf == BUFFER_BIT_FRONT_LEFT) {
src = intel->front_region;
clipRects = dPriv->pClipRects;
numClipRects = dPriv->numClipRects;
}
else {
src = intel->back_region;
clipRects = dPriv->pBackClipRects;
numClipRects = dPriv->numBackClipRects;
}
if (src->cpp == 4) {
format = GL_BGRA;
type = GL_UNSIGNED_BYTE;
}
@ -456,25 +466,12 @@ void intelRotateWindow(struct intel_context *intel,
type = GL_UNSIGNED_SHORT_5_6_5_REV;
}
if (srcBuf == BUFFER_BIT_FRONT_LEFT) {
srcPitch = screen->front.pitch; /* in bytes */
srcOffset = screen->front.offset; /* bytes */
clipRects = dPriv->pClipRects;
numClipRects = dPriv->numClipRects;
}
else {
srcPitch = screen->back.pitch; /* in bytes */
srcOffset = screen->back.offset; /* bytes */
clipRects = dPriv->pBackClipRects;
numClipRects = dPriv->numBackClipRects;
}
/* set the whole screen up as a texture to avoid alignment issues */
intel->vtbl.meta_tex_rect_source(intel,
srcOffset, /* XXX */
src->buffer,
screen->width,
screen->height,
srcPitch,
src->pitch,
format,
type);

144
src/mesa/drivers/dri/i915/intel_bufmgr.c
View file

@ -31,7 +31,6 @@
#include "intel_context.h"
#include "intel_ioctl.h"
#include "hash.h"
#include "simple_list.h"
#include "mm.h"
#include "imports.h"
@ -40,21 +39,26 @@
#include <unistd.h>
#include <drm.h>
struct _mesa_HashTable;
#define FILE_DEBUG_FLAG DEBUG_BUFMGR
/* The buffer manager is really part of the gl_shared_state struct.
* TODO: Organize for the bufmgr to be created/deleted with the shared
* state and stored within the DriverData of that struct. Currently
* there are no mesa callbacks for this.
*/
struct buffer {
drmMMBuf drm_buf;
const char *name;
int refcount;
};
#define BM_MAX 16
static struct bufmgr
{
_glthread_Mutex mutex; /**< for thread safety */
int driFd;
int refcount;
struct _mesa_HashTable *hash;
int driFd;
unsigned buf_nr; /* for generating ids */
drmMMPool batchPool;
@ -115,7 +119,6 @@ bm_intel_Attach(struct intel_context *intel)
_mesa_printf("create new bufmgr for fd %d\n", intel->driFd);
bm->driFd = intel->driFd;
bm->hash = _mesa_NewHashTable();
bm->refcount = 1;
_glthread_INIT_MUTEX(bm->mutex);
@ -137,8 +140,12 @@ bm_intel_Attach(struct intel_context *intel)
}
void
bmGenBuffers(struct bufmgr *bm, unsigned n, unsigned *buffers, unsigned flags)
bmGenBuffers(struct intel_context *intel,
const char *name,
unsigned n, struct buffer **buffers, unsigned flags)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
unsigned i;
@ -146,52 +153,49 @@ bmGenBuffers(struct bufmgr *bm, unsigned n, unsigned *buffers, unsigned flags)
(flags) ? flags : DRM_MM_TT | DRM_MM_VRAM | DRM_MM_SYSTEM;
for (i = 0; i < n; i++) {
drmMMBuf *buf = calloc(sizeof(*buf), 1);
struct buffer *buf = calloc(sizeof(*buf), 1);
BM_CKFATAL(drmMMInitBuffer(bm->driFd, bFlags, 12, buf));
buf->client_priv = ++bm->buf_nr;
buffers[i] = buf->client_priv;
_mesa_HashInsert(bm->hash, buffers[i], buf);
BM_CKFATAL(drmMMInitBuffer(bm->driFd, bFlags, 12, &buf->drm_buf));
buf->refcount = 1;
buf->name = name;
buffers[i] = buf;
}
}
UNLOCK(bm);
}
void
bmSetShared(struct bufmgr *bm, unsigned buffer, unsigned flags,
bmSetShared(struct intel_context *intel, struct buffer *buffer, unsigned flags,
unsigned long offset, void *virtual)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
drmMMBuf *buf = _mesa_HashLookup(bm->hash, buffer);
assert(buf);
buf->flags = DRM_MM_NO_EVICT | DRM_MM_SHARED
buffer->drm_buf.flags = DRM_MM_NO_EVICT | DRM_MM_SHARED
| DRM_MM_WRITE | DRM_MM_READ;
buf->flags |= flags & DRM_MM_MEMTYPE_MASK;
buf->offset = offset;
buf->virtual = virtual;
BM_CKFATAL(drmMMAllocBuffer(bm->driFd, 0, NULL, 0, buf));
buffer->drm_buf.flags |= flags & DRM_MM_MEMTYPE_MASK;
buffer->drm_buf.offset = offset;
buffer->drm_buf.virtual = virtual;
BM_CKFATAL(drmMMAllocBuffer(bm->driFd, 0, NULL, 0, &buffer->drm_buf));
}
UNLOCK(bm);
}
void
bmDeleteBuffers(struct bufmgr *bm, unsigned n, unsigned *buffers)
bmDeleteBuffers(struct intel_context *intel, unsigned n, struct buffer **buffers)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
unsigned i;
for (i = 0; i < n; i++) {
drmMMBuf *buf = _mesa_HashLookup(bm->hash, buffers[i]);
struct buffer *buf = buffers[i];
if (buf) {
BM_CKFATAL(drmMMFreeBuffer(bm->driFd, buf));
_mesa_HashRemove(bm->hash, buffers[i]);
}
if (buf)
BM_CKFATAL(drmMMFreeBuffer(bm->driFd, &buf->drm_buf));
}
}
UNLOCK(bm);
@ -202,12 +206,14 @@ bmDeleteBuffers(struct bufmgr *bm, unsigned n, unsigned *buffers)
*/
void
bmBufferData(struct bufmgr *bm,
unsigned buffer, unsigned size, const void *data, unsigned flags)
bmBufferData(struct intel_context *intel,
struct buffer *buffer, unsigned size, const void *data, unsigned flags)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
drmMMBuf *buf = &buffer->drm_buf;
DBG("bmBufferData %d sz 0x%x data: %p\n", buffer, size, data);
@ -243,13 +249,15 @@ bmBufferData(struct bufmgr *bm,
/* Update the buffer in place, in whatever space it is currently resident:
*/
void
bmBufferSubData(struct bufmgr *bm,
unsigned buffer,
bmBufferSubData(struct intel_context *intel,
struct buffer *buffer,
unsigned offset, unsigned size, const void *data)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
drmMMBuf *buf = &buffer->drm_buf;
DBG("bmBufferSubdata %d offset 0x%x sz 0x%x\n", buffer, offset, size);
@ -268,13 +276,15 @@ bmBufferSubData(struct bufmgr *bm,
/* Extract data from the buffer:
*/
void
bmBufferGetSubData(struct bufmgr *bm,
unsigned buffer,
bmBufferGetSubData(struct intel_context *intel,
struct buffer *buffer,
unsigned offset, unsigned size, void *data)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
drmMMBuf *buf = &buffer->drm_buf;
DBG("bmBufferSubdata %d offset 0x%x sz 0x%x\n", buffer, offset, size);
@ -294,13 +304,15 @@ bmBufferGetSubData(struct bufmgr *bm,
/* Return a pointer to whatever space the buffer is currently resident in:
*/
void *
bmMapBuffer(struct bufmgr *bm, unsigned buffer, unsigned flags)
bmMapBuffer(struct intel_context *intel,
struct buffer *buffer, unsigned flags)
{
struct bufmgr *bm = intel->bm;
void *retval;
LOCK(bm);
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
drmMMBuf *buf = &buffer->drm_buf;
DBG("bmMapBuffer %d\n", buffer);
DBG("Map: Block is 0x%x\n", &buf->block);
@ -318,11 +330,14 @@ bmMapBuffer(struct bufmgr *bm, unsigned buffer, unsigned flags)
}
void
bmUnmapBuffer(struct bufmgr *bm, unsigned buffer)
bmUnmapBuffer(struct intel_context *intel,
struct buffer *buffer)
{
struct bufmgr *bm = intel->bm;
LOCK(bm);
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
drmMMBuf *buf = &buffer->drm_buf;
if (!buf)
goto out;
@ -349,16 +364,14 @@ bmNewBufferList(void)
}
int
bmAddBuffer(struct bufmgr *bm,
bmAddBuffer(struct intel_context *intel,
struct _drmMMBufList *list,
unsigned buffer,
struct buffer *buffer,
unsigned flags,
unsigned *memtype_return, unsigned long *offset_return)
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
assert(buf);
return drmMMBufListAdd(list, buf, 0, flags, memtype_return, offset_return);
assert(buffer);
return drmMMBufListAdd(list, &buffer->drm_buf, 0, flags, memtype_return, offset_return);
}
void
@ -368,13 +381,10 @@ bmFreeBufferList(struct _drmMMBufList *list)
}
int
bmScanBufferList(struct bufmgr *bm,
struct _drmMMBufList *list, unsigned buffer)
bmScanBufferList(struct intel_context *intel,
struct _drmMMBufList *list, struct buffer *buffer)
{
drmMMBuf *buf = (drmMMBuf *) _mesa_HashLookup(bm->hash, buffer);
assert(buf);
return drmMMScanBufList(list, buf);
return drmMMScanBufList(list, &buffer->drm_buf);
}
/* To be called prior to emitting commands to hardware which reference
@ -386,10 +396,10 @@ bmScanBufferList(struct bufmgr *bm,
*/
int
bmValidateBufferList(struct bufmgr *bm,
bmValidateBufferList(struct intel_context *intel,
struct _drmMMBufList *list, unsigned flags)
{
BM_CKFATAL(drmMMValidateBuffers(bm->driFd, list));
BM_CKFATAL(drmMMValidateBuffers(intel->driFd, list));
return 0;
}
@ -402,12 +412,12 @@ bmValidateBufferList(struct bufmgr *bm,
* through the drm and without callbacks or whatever into the driver.
*/
unsigned
bmFenceBufferList(struct bufmgr *bm, struct _drmMMBufList *list)
bmFenceBufferList(struct intel_context *intel, struct _drmMMBufList *list)
{
drmFence fence;
BM_CKFATAL(drmMMFenceBuffers(bm->driFd, list));
BM_CKFATAL(drmEmitFence(bm->driFd, 0, &fence));
BM_CKFATAL(drmMMFenceBuffers(intel->driFd, list));
BM_CKFATAL(drmEmitFence(intel->driFd, 0, &fence));
return fence.fenceSeq;
}
@ -419,39 +429,39 @@ bmFenceBufferList(struct bufmgr *bm, struct _drmMMBufList *list)
* For now they can stay, but will likely change/move before final:
*/
unsigned
bmSetFence(struct bufmgr *bm)
bmSetFence(struct intel_context *intel)
{
drmFence dFence;
BM_CKFATAL(drmEmitFence(bm->driFd, 0, &dFence));
BM_CKFATAL(drmEmitFence(intel->driFd, 0, &dFence));
return dFence.fenceSeq;
}
int
bmTestFence(struct bufmgr *bm, unsigned fence)
bmTestFence(struct intel_context *intel, unsigned fence)
{
drmFence dFence;
int retired;
dFence.fenceType = 0;
dFence.fenceSeq = fence;
BM_CKFATAL(drmTestFence(bm->driFd, dFence, 0, &retired));
BM_CKFATAL(drmTestFence(intel->driFd, dFence, 0, &retired));
return retired;
}
void
bmFinishFence(struct bufmgr *bm, unsigned fence)
bmFinishFence(struct intel_context *intel, unsigned fence)
{
drmFence dFence;
dFence.fenceType = 0;
dFence.fenceSeq = fence;
BM_CKFATAL(drmWaitFence(bm->driFd, dFence));
bm->initFence = dFence;
BM_CKFATAL(drmWaitFence(intel->driFd, dFence));
intel->bm->initFence = dFence;
}
unsigned
bmInitFence(struct bufmgr *bm)
bmInitFence(struct intel_context *intel)
{
return bm->initFence.fenceSeq;
return intel->bm->initFence.fenceSeq;
}

54
src/mesa/drivers/dri/i915/intel_bufmgr.h
View file

@ -31,13 +31,11 @@
#include "intel_context.h"
/* Note that this is destined to be external to Mesa, so don't use GL
* types like GLuint, etc.
*/
/* The buffer manager context. Opaque.
*/
struct bufmgr;
struct buffer;
struct bufmgr *bm_intel_Attach(struct intel_context *intel);
@ -48,30 +46,32 @@ struct bufmgr *bm_intel_Attach(struct intel_context *intel);
* understood, and drivers can just pass the calls through without too
* much thunking.
*/
void bmGenBuffers(struct bufmgr *, unsigned n, unsigned *buffers,
void bmGenBuffers(struct intel_context *,
const char *name,
unsigned n, struct buffer **buffers,
unsigned flags);
void bmDeleteBuffers(struct bufmgr *, unsigned n, unsigned *buffers);
void bmDeleteBuffers(struct intel_context *, unsigned n, struct buffer **buffers);
/* The driver has more intimate knowledge of the hardare than a GL
* client would, so flags here is more proscriptive than the usage
* values in the ARB_vbo interface:
*/
void bmBufferData(struct bufmgr *,
unsigned buffer,
void bmBufferData(struct intel_context *,
struct buffer *buffer,
unsigned size, const void *data, unsigned flags);
void bmBufferSubData(struct bufmgr *,
unsigned buffer,
void bmBufferSubData(struct intel_context *,
struct buffer *buffer,
unsigned offset, unsigned size, const void *data);
void bmBufferGetSubData(struct bufmgr *,
unsigned buffer,
void bmBufferGetSubData(struct intel_context *,
struct buffer *buffer,
unsigned offset, unsigned size, void *data);
void *bmMapBuffer(struct bufmgr *, unsigned buffer, unsigned access);
void *bmMapBuffer(struct intel_context *, struct buffer *buffer, unsigned access);
void bmUnmapBuffer(struct bufmgr *, unsigned buffer);
void bmUnmapBuffer(struct intel_context *, struct buffer *buffer);
/* To be called prior to emitting commands to hardware which reference
* these buffers.
@ -94,21 +94,21 @@ void bmUnmapBuffer(struct bufmgr *, unsigned buffer);
*/
struct _drmMMBufList *bmNewBufferList(void);
int bmAddBuffer(struct bufmgr *bm,
int bmAddBuffer(struct intel_context *,
struct _drmMMBufList *list,
unsigned buffer,
struct buffer *buffer,
unsigned flags,
unsigned *pool_return, unsigned long *offset_return);
int bmValidateBufferList(struct bufmgr *,
int bmValidateBufferList(struct intel_context *,
struct _drmMMBufList *, unsigned flags);
unsigned bmFenceBufferList(struct bufmgr *, struct _drmMMBufList *);
unsigned bmFenceBufferList(struct intel_context *, struct _drmMMBufList *);
void bmFreeBufferList(struct _drmMMBufList *);
int bmScanBufferList(struct bufmgr *bm,
struct _drmMMBufList *list, unsigned buffer);
int bmScanBufferList(struct intel_context *,
struct _drmMMBufList *list, struct buffer *buffer);
/* This functionality is used by the buffer manager, not really sure
* if we need to be exposing it in this way, probably libdrm will
@ -116,17 +116,11 @@ int bmScanBufferList(struct bufmgr *bm,
*
* For now they can stay, but will likely change/move before final:
*/
unsigned bmSetFence(struct bufmgr *);
int bmTestFence(struct bufmgr *, unsigned fence);
void bmFinishFence(struct bufmgr *, unsigned fence);
unsigned bmInitFence(struct bufmgr *bm);
void bmSetShared(struct bufmgr *bm, unsigned buffer,
unsigned bmSetFence(struct intel_context *);
int bmTestFence(struct intel_context *, unsigned fence);
void bmFinishFence(struct intel_context *, unsigned fence);
unsigned bmInitFence(struct intel_context *);
void bmSetShared(struct intel_context *, struct buffer *buffer,
unsigned flags, unsigned long offset, void *virtual);
extern int INTEL_DEBUG;
#define DEBUG_BUFMGR 0x2000
#define DBG(...) do { if (INTEL_DEBUG & DEBUG_BUFMGR) _mesa_printf(__VA_ARGS__); } while(0)
#endif

8
src/mesa/drivers/dri/i915/intel_context.c
View file

@ -215,12 +215,12 @@ static const struct dri_debug_control debug_control[] =
{ "fall", DEBUG_FALLBACKS },
{ "tex", DEBUG_TEXTURE },
{ "ioctl", DEBUG_IOCTL },
{ "prim", DEBUG_PRIMS },
{ "blit", DEBUG_BLIT },
{ "vert", DEBUG_VERTS },
{ "state", DEBUG_STATE },
{ "verb", DEBUG_VERBOSE },
{ "dri", DEBUG_DRI },
{ "dma", DEBUG_DMA },
{ "bat", DEBUG_BATCH },
{ "san", DEBUG_SANITY },
{ "sync", DEBUG_SYNC },
{ "sleep", DEBUG_SLEEP },
@ -363,7 +363,7 @@ void intelFinish( GLcontext *ctx )
{
struct intel_context *intel = intel_context( ctx );
intelFlush( ctx );
bmFinishFence( intel->bm, intel->batch->last_fence );
bmFinishFence( intel, intel->batch->last_fence );
intelCheckFrontRotate(ctx);
}
@ -508,7 +508,7 @@ GLboolean intelInitContext( struct intel_context *intel,
intel->batch = intel_batchbuffer_alloc( intel );
intel->last_swap_fence_retired = GL_TRUE;
intel->last_swap_fence = bmInitFence(intel->bm);
intel->last_swap_fence = bmInitFence(intel);
intel_recreate_static_regions( intel );
intel_bufferobj_init( intel );

10
src/mesa/drivers/dri/i915/intel_context.h
View file

@ -50,6 +50,7 @@
struct intel_region;
struct intel_context;
struct buffer;
typedef void (*intel_tri_func)(struct intel_context *, intelVertex *, intelVertex *,
intelVertex *);
@ -158,7 +159,7 @@ struct intel_context
void (*meta_import_pixel_state)( struct intel_context *intel );
GLboolean (*meta_tex_rect_source)( struct intel_context *intel,
GLuint buffer,
struct buffer *buffer,
GLuint offset,
GLuint pitch,
GLuint height,
@ -428,16 +429,19 @@ extern int INTEL_DEBUG;
#define DEBUG_TEXTURE 0x1
#define DEBUG_STATE 0x2
#define DEBUG_IOCTL 0x4
#define DEBUG_PRIMS 0x8
#define DEBUG_BLIT 0x8
#define DEBUG_VERTS 0x10
#define DEBUG_FALLBACKS 0x20
#define DEBUG_VERBOSE 0x40
#define DEBUG_DRI 0x80
#define DEBUG_DMA 0x100
#define DEBUG_BATCH 0x100
#define DEBUG_SANITY 0x200
#define DEBUG_SYNC 0x400
#define DEBUG_SLEEP 0x800
#define DEBUG_PIXEL 0x1000
#define DEBUG_BUFMGR 0x2000
#define DBG(...) do { if (INTEL_DEBUG & FILE_DEBUG_FLAG) _mesa_printf(__VA_ARGS__); } while(0)
#define PCI_CHIP_845_G 0x2562

37
src/mesa/drivers/dri/i915/intel_ioctl.c
View file

@ -43,6 +43,8 @@
#include "drm.h"
#include "intel_bufmgr.h"
#define FILE_DEBUG_FLAG DEBUG_IOCTL
int intelEmitIrqLocked( struct intel_context *intel )
{
drmI830IrqEmit ie;
@ -60,8 +62,7 @@ int intelEmitIrqLocked( struct intel_context *intel )
exit(1);
}
if (0)
fprintf(stderr, "%s --> %d\n", __FUNCTION__, seq );
DBG("%s --> %d\n", __FUNCTION__, seq );
return seq;
}
@ -70,8 +71,7 @@ void intelWaitIrq( struct intel_context *intel, int seq )
{
int ret;
if (0)
fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
DBG("%s %d\n", __FUNCTION__, seq );
intel->iw.irq_seq = seq;
@ -97,14 +97,13 @@ void intel_batch_ioctl( struct intel_context *intel,
assert(intel->locked);
assert(used);
if (0)
fprintf(stderr, "%s used %d offset %x..%x ignore_cliprects %d\n",
__FUNCTION__,
used,
start_offset,
start_offset + used,
ignore_cliprects);
DBG("%s used %d offset %x..%x ignore_cliprects %d\n",
__FUNCTION__,
used,
start_offset,
start_offset + used,
ignore_cliprects);
/* Throw away non-effective packets. Won't work once we have
* hardware contexts which would preserve statechanges beyond a
* single buffer.
@ -127,20 +126,18 @@ void intel_batch_ioctl( struct intel_context *intel,
batch.DR4 = ((((GLuint)intel->drawX) & 0xffff) |
(((GLuint)intel->drawY) << 16));
if (INTEL_DEBUG & DEBUG_DMA)
fprintf(stderr, "%s: 0x%x..0x%x DR4: %x cliprects: %d\n",
__FUNCTION__,
batch.start,
batch.start + batch.used * 4,
batch.DR4, batch.num_cliprects);
#if 1
DBG("%s: 0x%x..0x%x DR4: %x cliprects: %d\n",
__FUNCTION__,
batch.start,
batch.start + batch.used * 4,
batch.DR4, batch.num_cliprects);
if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch,
sizeof(batch))) {
fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
UNLOCK_HARDWARE(intel);
exit(1);
}
#endif
/* FIXME: use hardware contexts to avoid 'losing' hardware after
* each buffer flush.

2
src/mesa/drivers/dri/i915/intel_mipmap_tree.c
View file

@ -31,6 +31,8 @@
#include "intel_bufmgr.h"
#include "enums.h"
#define FILE_DEBUG_FLAG DEBUG_TEXTURE
static GLenum target_to_target( GLenum target )
{
switch (target) {

4
src/mesa/drivers/dri/i915/intel_pixel_draw.c
View file

@ -218,7 +218,7 @@ static GLboolean do_blit_drawpixels( GLcontext *ctx,
struct intel_buffer_object *src = intel_buffer_object(unpack->BufferObj);
GLuint src_offset;
GLuint rowLength;
GLuint fence = bmInitFence(intel->bm);
GLuint fence = bmInitFence(intel);
if (INTEL_DEBUG & DEBUG_PIXEL)
_mesa_printf("%s\n", __FUNCTION__);
@ -329,7 +329,7 @@ static GLboolean do_blit_drawpixels( GLcontext *ctx,
UNLOCK_HARDWARE( intel );
if (intel->driDrawable->numClipRects)
bmFinishFence(intel->bm, fence);
bmFinishFence(intel, fence);
if (INTEL_DEBUG & DEBUG_PIXEL)
_mesa_printf("%s - DONE\n", __FUNCTION__);

4
src/mesa/drivers/dri/i915/intel_pixel_read.c
View file

@ -184,7 +184,7 @@ static GLboolean do_blit_readpixels( GLcontext *ctx,
struct intel_buffer_object *dst = intel_buffer_object(pack->BufferObj);
GLuint dst_offset;
GLuint rowLength;
GLuint fence = bmInitFence(intel->bm);
GLuint fence = bmInitFence(intel);
if (INTEL_DEBUG & DEBUG_PIXEL)
_mesa_printf("%s\n", __FUNCTION__);
@ -287,7 +287,7 @@ static GLboolean do_blit_readpixels( GLcontext *ctx,
UNLOCK_HARDWARE( intel );
if (intel->driDrawable->numClipRects)
bmFinishFence(intel->bm, fence);
bmFinishFence(intel, fence);
if (INTEL_DEBUG & DEBUG_PIXEL)
_mesa_printf("%s - DONE\n", __FUNCTION__);

17
src/mesa/drivers/dri/i915/intel_regions.c
View file

@ -44,13 +44,16 @@
#include "intel_blit.h"
#include "intel_bufmgr.h"
#define FILE_DEBUG_FLAG DEBUG_BUFMGR
/* XXX: Thread safety?
*/
GLubyte *intel_region_map(struct intel_context *intel, struct intel_region *region)
{
DBG("%s\n", __FUNCTION__);
if (!region->map_refcount++) {
region->map = bmMapBuffer(intel->bm, region->buffer, 0);
region->map = bmMapBuffer(intel, region->buffer, 0);
}
return region->map;
@ -61,7 +64,7 @@ void intel_region_unmap(struct intel_context *intel,
{
DBG("%s\n", __FUNCTION__);
if (!--region->map_refcount) {
bmUnmapBuffer(intel->bm, region->buffer);
bmUnmapBuffer(intel, region->buffer);
region->map = NULL;
}
}
@ -80,8 +83,8 @@ struct intel_region *intel_region_alloc( struct intel_context *intel,
region->height = height; /* needed? */
region->refcount = 1;
bmGenBuffers(intel->bm, 1, &region->buffer, 0);
bmBufferData(intel->bm, region->buffer, pitch * cpp * height, NULL, 0);
bmGenBuffers(intel, "region", 1, &region->buffer, 0);
bmBufferData(intel, region->buffer, pitch * cpp * height, NULL, 0);
return region;
}
@ -109,7 +112,7 @@ void intel_region_release( struct intel_context *intel,
if ((*region)->refcount == 0) {
assert((*region)->map_refcount == 0);
bmDeleteBuffers(intel->bm, 1, &(*region)->buffer);
bmDeleteBuffers(intel, 1, &(*region)->buffer);
free(*region);
}
*region = NULL;
@ -137,8 +140,8 @@ struct intel_region *intel_region_create_static( struct intel_context *intel,
* shared by others.
*/
bmGenBuffers(intel->bm, 1, &region->buffer, DRM_MM_TT | DRM_MM_SHARED);
bmSetShared(intel->bm, region->buffer, DRM_MM_TT, offset, virtual);
bmGenBuffers(intel, "static region", 1, &region->buffer, DRM_MM_TT | DRM_MM_SHARED);
bmSetShared(intel, region->buffer, DRM_MM_TT, offset, virtual);
return region;
}

2
src/mesa/drivers/dri/i915/intel_regions.h
View file

@ -41,7 +41,7 @@ struct intel_context;
* - Blitter commands for copying 2D regions between buffers. (really???)
*/
struct intel_region {
GLuint buffer; /**< buffer manager's buffer ID */
struct buffer *buffer; /**< buffer manager's buffer ID */
GLuint refcount; /**< Reference count for region */
GLuint cpp; /**< bytes per pixel */
GLuint pitch; /**< in pixels */

2
src/mesa/drivers/dri/i915/intel_tex_image.c
View file

@ -18,10 +18,12 @@
#include "intel_context.h"
#include "intel_mipmap_tree.h"
#include "intel_buffer_objects.h"
#include "intel_batchbuffer.h"
#include "intel_tex.h"
#include "intel_ioctl.h"
#include "intel_blit.h"
#define FILE_DEBUG_FLAG DEBUG_TEXTURE
/* Functions to store texture images. Where possible, mipmap_tree's
* will be created or further instantiated with image data, otherwise

1
src/mesa/drivers/dri/i915/intel_tex_subimage.c
View file

@ -35,6 +35,7 @@
#include "intel_tex.h"
#include "intel_mipmap_tree.h"
#define FILE_DEBUG_FLAG DEBUG_TEXTURE
static void intelTexSubimage (GLcontext *ctx,
GLint dims,

2
src/mesa/drivers/dri/i915/intel_tex_validate.c
View file

@ -6,6 +6,8 @@
#include "intel_tex.h"
#include "intel_bufmgr.h"
#define FILE_DEBUG_FLAG DEBUG_TEXTURE
/**
* Compute which mipmap levels that really need to be sent to the hardware.
* This depends on the base image size, GL_TEXTURE_MIN_LOD,