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ir3: Expand cat6 a6xx opcode field
Turns out the low bit of pad3 is actually the high bit of the opcode. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7386>
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2 changed files with 11 additions and 11 deletions
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@ -888,23 +888,23 @@ typedef enum {
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/**
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* For atomic ops (which return a value):
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*
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* pad1=1, pad3=c, pad5=3
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* pad1=1, pad3=6, pad5=3
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* src1 - vecN offset/coords
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* src2.x - is actually dest register
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* src2.y - is 'data' except for cmpxchg where src2.y is 'compare'
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* and src2.z is 'data'
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*
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* For stib (which does not return a value):
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* pad1=0, pad3=c, pad5=2
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* pad1=0, pad3=6, pad5=2
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* src1 - vecN offset/coords
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* src2 - value to store
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*
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* For ldib:
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* pad1=1, pad3=c, pad5=2
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* pad1=1, pad3=6, pad5=2
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* src1 - vecN offset/coords
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*
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* for ldc (load from UBO using descriptor):
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* pad1=0, pad3=8, pad5=2
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* pad1=0, pad3=4, pad5=2
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*
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* pad2 and pad5 are only observed to be 0.
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*/
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@ -917,8 +917,8 @@ typedef struct PACKED {
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uint32_t d : 2;
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uint32_t typed : 1;
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uint32_t type_size : 2;
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uint32_t opc : 5;
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uint32_t pad3 : 5;
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uint32_t opc : 6;
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uint32_t pad3 : 4;
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uint32_t src1 : 8; /* coordinate/offset */
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/* dword1: */
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@ -1011,7 +1011,7 @@ static inline bool is_cat6_legacy(instr_t *instr, unsigned gpu_id)
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* cmdstream traces I have indicates that the pad bit is zero
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* in all cases. So we can use this to detect new encoding:
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*/
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if ((cat6->pad3 & 0x8) && (cat6->pad5 & 0x2)) {
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if ((cat6->pad3 & 0x4) && (cat6->pad5 & 0x2)) {
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ir3_assert(gpu_id >= 600);
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ir3_assert(instr->cat6.opc == 0);
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return false;
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@ -599,23 +599,23 @@ static int emit_cat6_a6xx(struct ir3_instruction *instr, void *ptr,
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case OPC_ATOMIC_OR:
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case OPC_ATOMIC_XOR:
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cat6->pad1 = 0x1;
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cat6->pad3 = 0xc;
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cat6->pad3 = 0x6;
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cat6->pad5 = 0x3;
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break;
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case OPC_STIB:
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cat6->pad1 = 0x0;
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cat6->pad3 = 0xc;
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cat6->pad3 = 0x6;
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cat6->pad5 = 0x2;
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break;
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case OPC_LDIB:
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case OPC_RESINFO:
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cat6->pad1 = 0x1;
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cat6->pad3 = 0xc;
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cat6->pad3 = 0x6;
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cat6->pad5 = 0x2;
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break;
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case OPC_LDC:
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cat6->pad1 = 0x0;
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cat6->pad3 = 0x8;
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cat6->pad3 = 0x4;
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cat6->pad5 = 0x2;
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break;
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default:
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