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radv/meta: remove dead DCC clear code about E5B9B9R9_UFLOAT_PACK32
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Only GFX10.3+ supports COLOR_ATTACHMENT/STORAGE with this format, so older
gens can't have DCC either.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39689>
This commit is contained in:
Samuel Pitoiset 2026-02-05 16:59:24 +01:00 • committed by Marge Bot
parent 181bb1fc93
commit c817ef30ee
1 changed files with 1 additions and 25 deletions
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26
src/amd/vulkan/meta/radv_meta_clear.c
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@ -1903,25 +1903,11 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *imag
else
internal_clear_value.depthStencil = clear_value->depthStencil;
bool disable_compression = false;
if (format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32) {
if (cs ? !radv_is_storage_image_format_supported(pdev, format)
: !radv_is_colorbuffer_format_supported(pdev, format)) {
format = VK_FORMAT_R32_UINT;
internal_clear_value.color.uint32[0] = float3_to_rgb9e5(clear_value->color.float32);
uint32_t queue_mask = radv_image_queue_family_mask(image, cmd_buffer->qf, cmd_buffer->qf);
for (uint32_t r = 0; r < range_count; r++) {
const VkImageSubresourceRange *range = &ranges[r];
/* Don't use compressed image stores because they will use an incompatible format. */
if (radv_layout_dcc_compressed(device, image, range->baseMipLevel, image_layout, queue_mask)) {
disable_compression = cs;
break;
}
}
}
}
@ -1947,25 +1933,15 @@ radv_cmd_clear_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *imag
surf.level = range->baseMipLevel + l;
surf.layer = range->baseArrayLayer + s;
surf.aspect_mask = range->aspectMask;
surf.disable_compression = disable_compression;
surf.disable_compression = false;
radv_meta_clear_image_cs(cmd_buffer, &surf, &internal_clear_value.color);
}
} else {
assert(!disable_compression);
radv_clear_image_layer(cmd_buffer, image, image_layout, range, format, l, layer_count,
&internal_clear_value);
}
}
}
if (disable_compression) {
enum radv_cmd_flush_bits flush_bits = 0;
for (unsigned i = 0; i < range_count; i++) {
if (radv_dcc_enabled(image, ranges[i].baseMipLevel))
flush_bits |= radv_clear_dcc(cmd_buffer, image, &ranges[i], DCC_UNCOMPRESSED);
}
cmd_buffer->state.flush_bits |= flush_bits;
}
}
VKAPI_ATTR void VKAPI_CALL