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radv: emit individual SET_SH_REG for inlined push constants with DGC

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This should allow to preprocess if everything is inlined.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25935>
This commit is contained in:
Samuel Pitoiset 2023-10-27 10:15:33 +02:00 • committed by Marge Bot
parent 0112a245f5
commit c8140e4c0e
1 changed files with 8 additions and 6 deletions
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14
src/amd/vulkan/radv_device_generated_commands.c
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@ -118,7 +118,7 @@ radv_get_sequence_size(const struct radv_indirect_command_layout *layout, struct
}
if (locs->shader_data[AC_UD_INLINE_PUSH_CONSTANTS].sgpr_idx >= 0)
/* One PKT3_SET_SH_REG writing all inline push constants. */
*cmd_size += (2 + locs->shader_data[AC_UD_INLINE_PUSH_CONSTANTS].num_sgprs) * 4;
*cmd_size += (3 * locs->shader_data[AC_UD_INLINE_PUSH_CONSTANTS].num_sgprs) * 4;
}
if (need_copy)
*upload_size += align(pipeline->push_constant_size + 16 * pipeline->dynamic_offset_count, 16);
@ -795,12 +795,10 @@ dgc_emit_push_constant(nir_builder *b, struct dgc_cmdbuf *cs, nir_def *stream_bu
nir_push_if(b, nir_ine_imm(b, inline_sgpr, 0));
{
nir_def *inline_len = nir_bit_count(b, inline_mask);
nir_store_var(b, idx, nir_imm_int(b, 0), 0x1);
nir_def *pkt[2] = {nir_pkt3(b, PKT3_SET_SH_REG, inline_len), inline_sgpr};
dgc_emit(b, cs, nir_vec(b, pkt, 2));
nir_variable *pc_idx = nir_variable_create(b->shader, nir_var_shader_temp, glsl_uint_type(), "pc_idx");
nir_store_var(b, pc_idx, nir_imm_int(b, 0), 0x1);
nir_push_loop(b);
{
@ -841,9 +839,13 @@ dgc_emit_push_constant(nir_builder *b, struct dgc_cmdbuf *cs, nir_def *stream_bu
}
nir_pop_if(b, NULL);
dgc_emit(b, cs, nir_load_var(b, data));
nir_def *pkt[3] = {nir_pkt3(b, PKT3_SET_SH_REG, nir_imm_int(b, 1)),
nir_iadd(b, inline_sgpr, nir_load_var(b, pc_idx)), nir_load_var(b, data)};
dgc_emit(b, cs, nir_vec(b, pkt, 3));
nir_store_var(b, idx, nir_iadd_imm(b, cur_idx, 1), 0x1);
nir_store_var(b, pc_idx, nir_iadd_imm(b, nir_load_var(b, pc_idx), 1), 0x1);
}
nir_pop_loop(b, NULL);
}