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aco: use DefInfo in more places to simplify RA
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
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1 changed files with 19 additions and 42 deletions
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@ -92,9 +92,6 @@ struct DefInfo {
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uint8_t stride;
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RegClass rc;
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DefInfo(uint32_t lb, uint32_t ub, uint32_t size, uint32_t stride, RegClass rc) :
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lb(lb), ub(ub), size(size), stride(stride), rc(rc) {}
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DefInfo(ra_ctx& ctx, aco_ptr<Instruction>& instr, RegClass rc) : rc(rc) {
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size = rc.size();
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stride = 1;
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@ -509,14 +506,8 @@ bool get_regs_for_copies(ra_ctx& ctx,
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for (std::set<std::pair<unsigned, unsigned>>::const_reverse_iterator it = vars.rbegin(); it != vars.rend(); ++it) {
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unsigned id = it->second;
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assignment& var = ctx.assignments[id];
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uint32_t size = var.rc.size();
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uint32_t stride = 1;
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if (var.rc.type() == RegType::sgpr) {
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if (size == 2)
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stride = 2;
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if (size > 3)
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stride = 4;
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}
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DefInfo info = DefInfo(ctx, ctx.pseudo_dummy, var.rc);
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uint32_t size = info.size;
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/* check if this is a dead operand, then we can re-use the space from the definition */
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bool is_dead_operand = false;
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@ -538,15 +529,17 @@ bool get_regs_for_copies(ra_ctx& ctx,
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}
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}
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} else {
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DefInfo info = {def_reg_lo, def_reg_hi + 1, size, stride, var.rc};
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info.lb = def_reg_lo;
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info.ub = def_reg_hi + 1;
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res = get_reg_simple(ctx, reg_file, info);
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}
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} else {
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DefInfo info = {lb, def_reg_lo, size, stride, var.rc};
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info.lb = lb;
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info.ub = def_reg_lo;
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res = get_reg_simple(ctx, reg_file, info);
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if (!res.second) {
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unsigned lb = (def_reg_hi + stride) & ~(stride - 1);
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DefInfo info = {lb, ub, size, stride, var.rc};
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info.lb = (def_reg_hi + info.stride) & ~(info.stride - 1);
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info.ub = ub;
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res = get_reg_simple(ctx, reg_file, info);
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}
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}
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@ -571,6 +564,7 @@ bool get_regs_for_copies(ra_ctx& ctx,
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/* we use a sliding window to find potential positions */
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unsigned reg_lo = lb;
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unsigned reg_hi = lb + size - 1;
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unsigned stride = var.rc.is_subdword() ? 1 : info.stride;
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for (reg_lo = lb, reg_hi = lb + size - 1; reg_hi < ub; reg_lo += stride, reg_hi += stride) {
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if (!is_dead_operand && ((reg_lo >= def_reg_lo && reg_lo <= def_reg_hi) ||
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(reg_hi >= def_reg_lo && reg_hi <= def_reg_hi)))
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@ -661,11 +655,15 @@ bool get_regs_for_copies(ra_ctx& ctx,
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std::pair<PhysReg, bool> get_reg_impl(ra_ctx& ctx,
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RegisterFile& reg_file,
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std::vector<std::pair<Operand, Definition>>& parallelcopies,
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uint32_t lb, uint32_t ub,
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uint32_t size, uint32_t stride,
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RegClass rc,
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DefInfo info,
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aco_ptr<Instruction>& instr)
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{
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uint32_t lb = info.lb;
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uint32_t ub = info.ub;
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uint32_t size = info.size;
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uint32_t stride = info.stride;
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RegClass rc = info.rc;
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/* check how many free regs we have */
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unsigned regs_free = reg_file.count_zero(PhysReg{lb}, ub-lb);
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@ -887,28 +885,6 @@ bool get_reg_specified(ra_ctx& ctx,
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return true;
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}
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std::pair<PhysReg, bool> get_reg_vec(ra_ctx& ctx,
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RegisterFile& reg_file,
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RegClass rc)
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{
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uint32_t size = rc.size();
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uint32_t stride = 1;
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uint32_t lb, ub;
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if (rc.type() == RegType::vgpr) {
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lb = 256;
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ub = 256 + ctx.program->max_reg_demand.vgpr;
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} else {
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lb = 0;
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ub = ctx.program->max_reg_demand.sgpr;
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if (size == 2)
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stride = 2;
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else if (size >= 4)
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stride = 4;
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}
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DefInfo info = {lb, ub, size, stride, rc};
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return get_reg_simple(ctx, reg_file, info);
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}
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PhysReg get_reg(ra_ctx& ctx,
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RegisterFile& reg_file,
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Temp temp,
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@ -945,7 +921,8 @@ PhysReg get_reg(ra_ctx& ctx,
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k += op.bytes();
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}
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std::pair<PhysReg, bool> res = get_reg_vec(ctx, reg_file, vec->definitions[0].regClass());
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DefInfo info(ctx, ctx.pseudo_dummy, vec->definitions[0].regClass());
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std::pair<PhysReg, bool> res = get_reg_simple(ctx, reg_file, info);
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PhysReg reg = res.first;
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if (res.second) {
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reg.reg_b += byte_offset;
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@ -971,7 +948,7 @@ PhysReg get_reg(ra_ctx& ctx,
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return res.first;
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/* try to find space with live-range splits */
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res = get_reg_impl(ctx, reg_file, parallelcopies, info.lb, info.ub, info.size, info.stride, info.rc, instr);
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res = get_reg_impl(ctx, reg_file, parallelcopies, info, instr);
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if (res.second)
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return res.first;
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