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aco: move rt_dynamic_callable_stack_base_amd to VGPR

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In future, we will use a VGPR arg for that between RT stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
This commit is contained in:
Daniel Schürmann 2023-03-10 13:14:01 +01:00 • committed by Marge Bot
parent 1f01a86b36
commit c7c68e1193
1 changed files with 1 additions and 0 deletions
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src/amd/compiler/aco_instruction_selection_setup.cpp
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@ -646,6 +646,7 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_intrinsic_gds_atomic_add_amd:
case nir_intrinsic_bvh64_intersect_ray_amd:
case nir_intrinsic_load_vector_arg_amd:
case nir_intrinsic_load_rt_dynamic_callable_stack_base_amd:
case nir_intrinsic_ordered_xfb_counter_add_amd: type = RegType::vgpr; break;
case nir_intrinsic_load_shared:
case nir_intrinsic_load_shared2_amd: